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authorStefan Reinauer <stepan@coresystems.de>2010-04-15 12:39:29 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-15 12:39:29 +0000
commit23836e2345282151b0b46de6cdcd2bb2faee87f6 (patch)
treee1e416ae11a78b455a26f378f33d0a8db6fa69af /src/mainboard/hp/dl145_g3
parentc30a6e859e20dbadbad006f2f93068e7f9c36043 (diff)
zero warnings days...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp/dl145_g3')
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c9
1 files changed, 1 insertions, 8 deletions
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 43f9e7f285..218304e2f5 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -107,16 +107,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdk8/amdk8_f.h"
-#include "northbridge/amd/amdk8/coherent_ht.c"
-
#include "northbridge/amd/amdk8/incoherent_ht.c"
-
+#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
-
#include "lib/generic_sdram.c"
-//#include "resourcemap.c"
-
#include "cpu/amd/dualcore/dualcore.c"
//first node
@@ -212,8 +207,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
pilot_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- //setup_mp_resource_map();
-
uart_init();
/* Halt if there was a built in self test failure */