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authorSubrata Banik <subratabanik@google.com>2024-07-19 00:31:01 +0530
committerSubrata Banik <subratabanik@google.com>2024-07-22 06:42:56 +0000
commit5b761660c6a3a504606b6fe023fb52220f0541bd (patch)
tree89f17e22b6fbfb303a7cda94ad9bdab99385f8cb /src/mainboard/google
parent039c7c8b018b5373450decaed6dbcbe3e15d313d (diff)
mb/google/brya/var/trulo: Add fw_config probe for storage devices
1. Add STORAGE_UNKNOWN fw_config to enable all storage devices, this is used for the first boot in factory. 2. Add fw_config probe to enable/disable devices in devicetree, to avoid suspend(s0ix) fail issue. 3. Disable eMMC controller incase STORAGE_UFS or STORAGE_NVME fw_config is enabled. BUG=b:351976770 TEST=Builds successfully for google/trulo. Change-Id: Ifdaa0bf35413981327097c260ab47e757f697e37 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/trulo/Makefile.mk2
-rw-r--r--src/mainboard/google/brya/variants/trulo/fw_config.c49
-rw-r--r--src/mainboard/google/brya/variants/trulo/overridetree.cb20
3 files changed, 69 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/trulo/Makefile.mk b/src/mainboard/google/brya/variants/trulo/Makefile.mk
index 87f515acad..ebeabf4b33 100644
--- a/src/mainboard/google/brya/variants/trulo/Makefile.mk
+++ b/src/mainboard/google/brya/variants/trulo/Makefile.mk
@@ -5,4 +5,6 @@ romstage-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c
+ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
+
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c
diff --git a/src/mainboard/google/brya/variants/trulo/fw_config.c b/src/mainboard/google/brya/variants/trulo/fw_config.c
new file mode 100644
index 0000000000..2977cb6c90
--- /dev/null
+++ b/src/mainboard/google/brya/variants/trulo/fw_config.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <fw_config.h>
+
+static const struct pad_config emmc_disable_pads[] = {
+ /* I7 : EMMC_CMD */
+ PAD_NC(GPP_I7, NONE),
+ /* I8 : EMMC_D0 */
+ PAD_NC(GPP_I8, NONE),
+ /* I9 : EMMC_D1 */
+ PAD_NC(GPP_I9, NONE),
+ /* I10 : EMMC_D2 */
+ PAD_NC(GPP_I10, NONE),
+ /* I11 : EMMC_D3 */
+ PAD_NC(GPP_I11, NONE),
+ /* I12 : EMMC_D4 */
+ PAD_NC(GPP_I12, NONE),
+ /* I13 : EMMC_D5 */
+ PAD_NC(GPP_I13, NONE),
+ /* I14 : EMMC_D6 */
+ PAD_NC(GPP_I14, NONE),
+ /* I15 : EMMC_D7 */
+ PAD_NC(GPP_I15, NONE),
+ /* I16 : EMMC_RCLK */
+ PAD_NC(GPP_I16, NONE),
+ /* I17 : EMMC_CLK */
+ PAD_NC(GPP_I17, NONE),
+ /* I18 : EMMC_RST_L */
+ PAD_NC(GPP_I18, NONE),
+};
+
+void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
+{
+ if (!fw_config_is_provisioned()) {
+ printk(BIOS_WARNING, "FW_CONFIG is not provisioned. Exiting...\n");
+ return;
+ }
+
+ if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
+ if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_EMMC))) {
+ printk(BIOS_INFO, "Disable eMMC GPIO pins.\n");
+ gpio_padbased_override(padbased_table, emmc_disable_pads,
+ ARRAY_SIZE(emmc_disable_pads));
+ }
+ }
+}
diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index d603c13782..cf01efb26e 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -1,3 +1,11 @@
+fw_config
+ field STORAGE 30 31
+ option STORAGE_EMMC 0
+ option STORAGE_NVME 1
+ option STORAGE_UFS 2
+ option STORAGE_UNKNOWN 3
+ end
+end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
@@ -202,14 +210,22 @@ chip soc/intel/alderlake
end
end #I2C5
device ref heci1 on end
- device ref emmc on end
+ device ref emmc on
+ probe STORAGE STORAGE_UNKNOWN
+ probe STORAGE STORAGE_EMMC
+ end
device ref ish on
chip drivers/intel/ish
register "add_acpi_dma_property" = "true"
device generic 0 on end
end
+ probe STORAGE STORAGE_UNKNOWN
+ probe STORAGE STORAGE_UFS
+ end
+ device ref ufs on
+ probe STORAGE STORAGE_UNKNOWN
+ probe STORAGE STORAGE_UFS
end
- device ref ufs on end
device ref uart0 on end
device ref pch_espi on
chip ec/google/chromeec