diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2024-02-15 15:39:38 -0600 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-02-18 02:29:36 +0000 |
| commit | c9c88fb598fb450c5171c823a72517087af8fe17 (patch) | |
| tree | 3227e3fbcceff13c63ca7dd58cece2aff2b486da /src/mainboard/google | |
| parent | 88d5807314b05d905b90dff2e301baade3cbdb28 (diff) | |
soc/intel/jasperlake: select SOC_INTEL_COMMON_BLOCK_DTT
Select this at the SoC level (like other modern Intel SoCs), and drop
it from individual boards which selected it.
Change-Id: I8ebb915fbc21f82e39304473b0fcaa620559b5d5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80558
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/dedede/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 9aa4410253..7c4212060b 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -29,7 +29,6 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 - select SOC_INTEL_COMMON_BLOCK_DTT select SOC_INTEL_COMMON_BLOCK_IPU select SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_JASPERLAKE |