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authorSubrata Banik <subratabanik@google.com>2024-10-28 18:54:25 +0530
committerSubrata Banik <subratabanik@google.com>2024-10-30 07:18:11 +0000
commitb1839874be10453bf14683ca97360f383dc2bb1f (patch)
tree588c51b3fea82e26cbbd2e4236a07440e00fc49e /src/mainboard/google
parent686b36bab86f49a796f07aaa9d73a9305461969a (diff)
mb/google/fatcat: Ensure RW_SECTION_B at 16MB boundary for debug FMD
This patch updates the flash map layout to guarantee that the RW_SECTION_B section starts at the 16MB boundary. Additionally, fix typo in flash descriptor comment, where comment incorrectly referred to "MTL" instead of "PTL". TEST=Successfully builds google/fatcat. Change-Id: Ia6dba611fba50f9694a75670d954a4630cde4d70 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84899 Reviewed-by: Pranava Y N <pranavayn@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/fatcat/chromeos-debug-fsp.fmd18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd b/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
index f34e495c2d..8d41977735 100644
--- a/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
+++ b/src/mainboard/google/fatcat/chromeos-debug-fsp.fmd
@@ -9,6 +9,15 @@ FLASH 32M {
FW_MAIN_A(CBFS)
RW_FWID_A 64
}
+ # This section starts at the 16M boundary in SPI flash.
+ # PTL does not support a region crossing this boundary,
+ # because the SPI flash is memory-mapped into two non-
+ # contiguous windows.
+ RW_SECTION_B 7680K {
+ VBLOCK_B 8K
+ FW_MAIN_B(CBFS)
+ RW_FWID_B 64
+ }
RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
RECOVERY_MRC_CACHE 64K
@@ -22,15 +31,6 @@ FLASH 32M {
RW_VPD(PRESERVE) 8K
RW_NVRAM(PRESERVE) 24K
}
- # This section starts at the 16M boundary in SPI flash.
- # MTL does not support a region crossing this boundary,
- # because the SPI flash is memory-mapped into two non-
- # contiguous windows.
- RW_SECTION_B 7680K {
- VBLOCK_B 8K
- FW_MAIN_B(CBFS)
- RW_FWID_B 64
- }
RW_LEGACY(CBFS) 1M
RW_UNUSED 2M
# Make WP_RO region align with SPI vendor