diff options
| author | Martin Roth <gaumless@gmail.com> | 2023-02-08 16:33:44 -0700 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-02-10 02:44:12 +0000 |
| commit | 871b47afa55c7d974bc5cd8bf2dc48b58ab7c463 (patch) | |
| tree | 60aa0d45567c0efc98c06668e975bd3224d73d78 /src/mainboard/google | |
| parent | 72de822ddc9e6ad04e2a04981d48eafe0b17c33b (diff) | |
Revert "mb/google/skyrim: Update ASPM settings for the NVMe device"
This reverts commit 8e1bb93fb88bc9cc20aab33a1fe09fb4c0c652a0.
Reason: Enabling L.2 breaks some devices on this bridge. Reverting
until a workaround is found and additional testing is done.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I9f721178244e7764e9b08e419db8a8c05ecc29a7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72916
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/skyrim/port_descriptors.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/skyrim/port_descriptors.c b/src/mainboard/google/skyrim/port_descriptors.c index 0046a33a06..d745bd7e1d 100644 --- a/src/mainboard/google/skyrim/port_descriptors.c +++ b/src/mainboard/google/skyrim/port_descriptors.c @@ -16,6 +16,7 @@ static const fsp_dxio_descriptor skyrim_mdn_dxio_descriptors[] = { .link_speed_capability = GEN3, .turn_off_unused_lanes = true, .link_aspm = ASPM_L1, + .link_hotplug = 3, .clk_req = CLK_REQ2, }, { /* SD */ @@ -28,6 +29,7 @@ static const fsp_dxio_descriptor skyrim_mdn_dxio_descriptors[] = { .link_speed_capability = GEN3, .turn_off_unused_lanes = true, .link_aspm = ASPM_L1, + .link_hotplug = 3, .gpio_group_id = GPIO_27, .clk_req = CLK_REQ1, }, @@ -41,7 +43,7 @@ static const fsp_dxio_descriptor skyrim_mdn_dxio_descriptors[] = { .link_speed_capability = GEN3, .turn_off_unused_lanes = true, .link_aspm = ASPM_L1, - .link_aspm_L1_2 = true, + .link_hotplug = 3, .gpio_group_id = GPIO_6, .clk_req = CLK_REQ0, }, |