diff options
| author | Ren Kuo <ren.kuo@quanta.corp-partner.google.com> | 2024-10-07 16:42:54 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-10-21 05:58:30 +0000 |
| commit | 4ef7c4602bf30fe898bdad28f47d44492776766e (patch) | |
| tree | 07ac40f367dde6004ebde75625b31cbd6fe0e993 /src/mainboard/google | |
| parent | 69ab3b8f684fdca673501167c4120d5efdea85d7 (diff) | |
mb/google/brox/jubilant: Modify WWAN Rolling RW101R-GL power sequence
There is no ACPI power resource for LTE module Rolling RW101R-GL,
therefore implement the power sequence of power-on, power-off, and
reset timing from GPIO init, bootstate init callbacks, and smihandler
function.
BUG=b:368450447
BRANCH=None
TEST= Build firmware and verify on jubilant with LTE:RW101R-GL.
Measure the power on, power off, and reset timing.
Run warm boot, cold boot and suspend/resume to make sure
WWAN devcie is workable.
Change-Id: I4a205e3db777c7c225d31b6cc802883fd7167089
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google')
4 files changed, 42 insertions, 3 deletions
diff --git a/src/mainboard/google/brox/variants/jubilant/Makefile.mk b/src/mainboard/google/brox/variants/jubilant/Makefile.mk index 878643e512..503ef8f722 100644 --- a/src/mainboard/google/brox/variants/jubilant/Makefile.mk +++ b/src/mainboard/google/brox/variants/jubilant/Makefile.mk @@ -9,3 +9,5 @@ ramstage-$(CONFIG_FW_CONFIG) += fw_config.c ramstage-$(CONFIG_FW_CONFIG) += variant.c ramstage-y += gpio.c ramstage-y += ramstage.c + +smm-y += smihandler.c diff --git a/src/mainboard/google/brox/variants/jubilant/gpio.c b/src/mainboard/google/brox/variants/jubilant/gpio.c index 71c00eadd0..c633a9116c 100644 --- a/src/mainboard/google/brox/variants/jubilant/gpio.c +++ b/src/mainboard/google/brox/variants/jubilant/gpio.c @@ -28,9 +28,10 @@ static const struct pad_config override_gpio_table[] = { */ PAD_CFG_GPO_LOCK(GPP_A12, 1, LOCK_CONFIG), /* GPP_H23 : SRCCLKREQ5_L ==> WWAN_RST_L */ - PAD_CFG_GPO_LOCK(GPP_H23, 1, LOCK_CONFIG), + PAD_CFG_GPO_LOCK(GPP_H23, 0, LOCK_CONFIG), /* GPP_F21 : [NF1: Reserved NF6: USB_C_GPP_F21] ==> WWAN_FCPO_L */ - PAD_CFG_GPO_LOCK(GPP_F21, 1, LOCK_CONFIG), + PAD_CFG_GPO_LOCK(GPP_F21, 0, LOCK_CONFIG), + /* GPP_H19 : SRCCLKREQ4_L ==> SAR1_INT_L */ PAD_CFG_GPI_APIC_LOCK(GPP_H19, NONE, LEVEL, NONE, LOCK_CONFIG), @@ -193,7 +194,7 @@ static const struct pad_config romstage_gpio_table[] = { /* GPP_H23 : SRCCLKREQ5_L ==> WWAN_RST_L */ PAD_CFG_GPO_LOCK(GPP_H23, 0, LOCK_CONFIG), /* GPP_F21 : [NF1: Reserved NF6: USB_C_GPP_F21] ==> WWAN_FCPO_L */ - PAD_CFG_GPO_LOCK(GPP_F21, 1, LOCK_CONFIG), + PAD_CFG_GPO_LOCK(GPP_F21, 0, LOCK_CONFIG), /* GPP_E15 : SRCCLK_OE8_L ==> MEM_STRAP_0 */ PAD_CFG_GPI(GPP_E15, NONE, PLTRST), diff --git a/src/mainboard/google/brox/variants/jubilant/smihandler.c b/src/mainboard/google/brox/variants/jubilant/smihandler.c new file mode 100644 index 0000000000..9f848eae4f --- /dev/null +++ b/src/mainboard/google/brox/variants/jubilant/smihandler.c @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <baseboard/variants.h> +#include <delay.h> + +#include "gpio.h" + +#define WWAN_FCPO_L GPP_F21 +#define WWAN_RSL_L GPP_H23 +#define WWAN_TOFF 15 + +void variant_smi_sleep(u8 slp_typ) +{ + if (slp_typ == ACPI_S5) { + /* WWAN RW101R-GL power off sequence */ + gpio_set(WWAN_RSL_L, 0); + mdelay(WWAN_TOFF); + gpio_set(WWAN_FCPO_L, 0); + } +} diff --git a/src/mainboard/google/brox/variants/jubilant/variant.c b/src/mainboard/google/brox/variants/jubilant/variant.c index 6cbfe19dfe..5b75380740 100644 --- a/src/mainboard/google/brox/variants/jubilant/variant.c +++ b/src/mainboard/google/brox/variants/jubilant/variant.c @@ -1,12 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> +#include <bootstate.h> #include <baseboard/variants.h> #include <chip.h> #include <device/device.h> #include <fw_config.h> #include <sar.h> +#include "gpio.h" + +#define WWAN_RSL_L GPP_H23 +#define WWAN_FCPO_L GPP_F21 + void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) { if (fw_config_probe(FW_CONFIG(WIFI_BT, WIFI_BT_CNVI)) || (!fw_config_is_provisioned())) { @@ -24,3 +30,12 @@ const char *get_wifi_sar_cbfs_filename(void) { return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_BT)); } + +static void wwan_out_of_reset(void *unused) +{ + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE))) { + gpio_set(WWAN_FCPO_L, 1); + gpio_set(WWAN_RSL_L, 1); + } +} +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, wwan_out_of_reset, NULL); |