diff options
author | Martin Roth <martinroth@google.com> | 2016-07-29 14:07:30 -0600 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-08-01 21:44:45 +0200 |
commit | 0cd338e6e489eacfedb8fab3ff161b1578d08f07 (patch) | |
tree | 8b729260de5a406dc22869ff5c5236ba77fbb0ed /src/mainboard/google | |
parent | bb9722bd775d575401edff14a9b80406ecbd974a (diff) |
Remove non-ascii & unprintable characters
These non-ascii & unprintable characters aren't needed.
Change-Id: I129f729f66d6a692de729d76971f7deb7a19c254
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15977
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/cosmos/chromeos.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/parrot/ec.h | 4 | ||||
-rw-r--r-- | src/mainboard/google/purin/chromeos.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/stout/ec.c | 4 | ||||
-rw-r--r-- | src/mainboard/google/stout/mainboard_smi.c | 4 | ||||
-rw-r--r-- | src/mainboard/google/veyron/chromeos.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/veyron_rialto/chromeos.c | 2 |
7 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/cosmos/chromeos.c b/src/mainboard/google/cosmos/chromeos.c index ca80432a93..a405cf0220 100644 --- a/src/mainboard/google/cosmos/chromeos.c +++ b/src/mainboard/google/cosmos/chromeos.c @@ -1,4 +1,4 @@ -/* +/* * This file is part of the coreboot project. * * Copyright 2014 Google Inc. diff --git a/src/mainboard/google/parrot/ec.h b/src/mainboard/google/parrot/ec.h index 200750a0e9..e389a77602 100644 --- a/src/mainboard/google/parrot/ec.h +++ b/src/mainboard/google/parrot/ec.h @@ -49,8 +49,8 @@ * AC power plug-out C8h * Modem Ring In CAh * PME signal active CEh - * Acer Hotkey Function – Make event D5h - * Acer Hotkey Function – Break event D6h + * Acer Hotkey Function - Make event D5h + * Acer Hotkey Function - Break event D6h */ #ifndef __ACPI__ diff --git a/src/mainboard/google/purin/chromeos.c b/src/mainboard/google/purin/chromeos.c index 0bd489a1e8..e6843a1489 100644 --- a/src/mainboard/google/purin/chromeos.c +++ b/src/mainboard/google/purin/chromeos.c @@ -1,4 +1,4 @@ -/* +/* * This file is part of the coreboot project. * * Copyright 2015 Google Inc. diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c index 004c492ed9..a7006d9d64 100644 --- a/src/mainboard/google/stout/ec.c +++ b/src/mainboard/google/stout/ec.c @@ -48,10 +48,10 @@ void stout_ec_init(void) * Set USB Power off in S3 (enabled in S3 path if requested in gnvs) * Bit0 of 0x0D/Bit0 of 0x26 * 0/0 All USB port off - * 1/0 USB on, all USB port didn’t support wake up + * 1/0 USB on, all USB port didn't support wake up * 0/1 USB on, yellow port support wake up charge, but may not support * charge smart phone. - * 1/1 USB on, yellow port in AUTO mode and didn’t support wake up system. + * 1/1 USB on, yellow port in AUTO mode and didn't support wake up system. */ ec_write(EC_PERIPH_CNTL_3, ec_read(EC_PERIPH_CNTL_3) & 0xE); ec_write(EC_USB_S3_EN, ec_read(EC_USB_S3_EN) & 0xE); diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c index 7fed9cf964..e25c576ba1 100644 --- a/src/mainboard/google/stout/mainboard_smi.c +++ b/src/mainboard/google/stout/mainboard_smi.c @@ -58,10 +58,10 @@ void mainboard_smi_sleep(u8 slp_typ) * Tell the EC to Enable USB power for S3 if requested. * Bit0 of 0x0D/Bit0 of 0x26 * 0/0 All USB port off - * 1/0 USB on, all USB port didn’t support wake up + * 1/0 USB on, all USB port didn't support wake up * 0/1 USB on, yellow port support wake up charge, but may not support * charge smart phone. - * 1/1 USB on, yellow port in AUTO mode and didn’t support wake up system. + * 1/1 USB on, yellow port in AUTO mode and didn't support wake up system. */ if (smm_get_gnvs()->s3u0 != 0 || smm_get_gnvs()->s3u1 != 0) { ec_write(EC_PERIPH_CNTL_3, ec_read(EC_PERIPH_CNTL_3) | 0x00); diff --git a/src/mainboard/google/veyron/chromeos.c b/src/mainboard/google/veyron/chromeos.c index 42be8ca5ff..b73062295a 100644 --- a/src/mainboard/google/veyron/chromeos.c +++ b/src/mainboard/google/veyron/chromeos.c @@ -1,4 +1,4 @@ -/* +/* * This file is part of the coreboot project. * * Copyright 2014 Rockchip Inc. diff --git a/src/mainboard/google/veyron_rialto/chromeos.c b/src/mainboard/google/veyron_rialto/chromeos.c index 74f84d4525..ac1afd9911 100644 --- a/src/mainboard/google/veyron_rialto/chromeos.c +++ b/src/mainboard/google/veyron_rialto/chromeos.c @@ -1,4 +1,4 @@ -/* +/* * This file is part of the coreboot project. * * Copyright 2014 Rockchip Inc. |