diff options
| author | Felix Singer <felixsinger@posteo.net> | 2020-07-29 21:44:36 +0200 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-08-08 12:00:23 +0000 |
| commit | 52919523c14396a8a5dffa34afe40b24b7d68dfc (patch) | |
| tree | 7a20492ce7ac016462b6bf4923741fdb9a4b38a0 /src/mainboard/google | |
| parent | 0da148e326f140ebdb9ef26e864ef453bc36bdfa (diff) | |
soc/intel/skylake: Enable SDXC depending on devicetree configuration
Currently, SDXC gets enabled by the option ScsSdCardEnabled,
but this duplicates the devicetree on/off options. Therefore, depend on
the devicetree for the enablement of the SDXC controller.
All corresponding mainboards were checked if the devicetree
configuration matches the ScsSdCardEnabled setting, and missing
entries were added.
Change-Id: I298b7d0b0fe2a7346dbadcea4be22dc67fce4de8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/mainboard/google')
14 files changed, 0 insertions, 18 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 8a459f71bc..8d15e8e50d 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -44,7 +44,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 651f174a27..e8412d5ce0 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -75,7 +75,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index f2d7c64d0c..108470bf92 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -46,7 +46,6 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/glados/variants/caroline/overridetree.cb b/src/mainboard/google/glados/variants/caroline/overridetree.cb index 7bee2e2a48..b1f3e8bb52 100644 --- a/src/mainboard/google/glados/variants/caroline/overridetree.cb +++ b/src/mainboard/google/glados/variants/caroline/overridetree.cb @@ -1,7 +1,5 @@ chip soc/intel/skylake - register "ScsSdCardEnabled" = "2" - register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/cave/overridetree.cb b/src/mainboard/google/glados/variants/cave/overridetree.cb index 9aeb78afa7..7753dd4fb2 100644 --- a/src/mainboard/google/glados/variants/cave/overridetree.cb +++ b/src/mainboard/google/glados/variants/cave/overridetree.cb @@ -1,7 +1,5 @@ chip soc/intel/skylake - register "ScsSdCardEnabled" = "2" - register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/glados/overridetree.cb b/src/mainboard/google/glados/variants/glados/overridetree.cb index c510e920a0..3a0fdd4418 100644 --- a/src/mainboard/google/glados/variants/glados/overridetree.cb +++ b/src/mainboard/google/glados/variants/glados/overridetree.cb @@ -1,7 +1,5 @@ chip soc/intel/skylake - register "ScsSdCardEnabled" = "2" - register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/sentry/overridetree.cb b/src/mainboard/google/glados/variants/sentry/overridetree.cb index 08d3dd3aba..36575f8856 100644 --- a/src/mainboard/google/glados/variants/sentry/overridetree.cb +++ b/src/mainboard/google/glados/variants/sentry/overridetree.cb @@ -1,7 +1,5 @@ chip soc/intel/skylake - register "ScsSdCardEnabled" = "2" - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port 1 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)" # Type-C Port 2 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index eae98356cb..73f8281d64 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index ea6267f699..8c638bad0c 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 98568f8d8d..851e240ddb 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -40,7 +40,6 @@ chip soc/intel/skylake register "Cio2Enable" = "0" register "SaImguEnable" = "0" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 43d6509ebb..e4f31123b5 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 2bd82a9cfe..c7540e95ac 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -46,7 +46,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index ef5cd1b008..0c221af2d2 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Cio2Enable" = "0" register "SaImguEnable" = "0" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index e5307c22cd..af501561af 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -41,7 +41,6 @@ chip soc/intel/skylake register "Cio2Enable" = "1" register "SaImguEnable" = "1" register "ScsEmmcHs400Enabled" = "1" - register "ScsSdCardEnabled" = "2" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" |