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authorWisley Chen <wisley.chen@quantatw.com>2021-01-15 13:48:38 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 09:11:57 +0000
commit5e6e5c11c7841d5a1df8e7a33466df1a8a2a6314 (patch)
tree6b4c0222825641759968347977efcd9774f92459 /src/mainboard/google
parent8130959d011023077738bd9d6b6b65ab0d7f5233 (diff)
mb/google/dedede/var/drawcia: Add support to handle pen detection
For board version 6 afterward, it will have external pull-up for GPP_C12, and remove internal pull-up. BUG=b:177618684 TEST=emerge-dedede coreboot, check evtest if SW_PEN_INSERTED event (value:1/0) when insert/eject pen, and eject pen to wake system from s0ix Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Change-Id: I503873afb48384168dcd8a822c7246655898356e Reviewed-on: https://review.coreboot.org/c/coreboot/+/49469 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Henry Sun <henrysun@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/Makefile.inc1
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/gpio.c36
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/overridetree.cb11
3 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/Makefile.inc b/src/mainboard/google/dedede/variants/drawcia/Makefile.inc
index 24c75d1d9a..04eb9a4877 100644
--- a/src/mainboard/google/dedede/variants/drawcia/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/drawcia/Makefile.inc
@@ -1,3 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-or-later
+ramstage-y += gpio.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c
diff --git a/src/mainboard/google/dedede/variants/drawcia/gpio.c b/src/mainboard/google/dedede/variants/drawcia/gpio.c
new file mode 100644
index 0000000000..a91a94ee55
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/drawcia/gpio.c
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <fw_config.h>
+#include <console/console.h>
+#include <ec/google/chromeec/ec.h>
+
+/* Pad configuration in ramstage*/
+static const struct pad_config pre_board6_gpio_table[] = {
+
+ /* C12 : AP_PEN_DET_ODL */
+ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, UP_20K, DEEP),
+};
+
+/* bid6: Pad configuration for board version 6 afterward in ramstage*/
+static const struct pad_config board6_gpio_table[] = {
+
+ /* C12 : AP_PEN_DET_ODL has an external pull-up and hence no pad termination.*/
+ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP),
+};
+
+const struct pad_config *variant_override_gpio_table(size_t *num)
+{
+ uint32_t board_version;
+ *num = ARRAY_SIZE(pre_board6_gpio_table);
+
+ if (!google_chromeec_cbi_get_board_version(&board_version)) {
+ if (board_version >= 6) {
+ *num = ARRAY_SIZE(board6_gpio_table);
+ return board6_gpio_table;
+ }
+ }
+
+ return pre_board6_gpio_table;
+}
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
index 59593432fe..fbc6f0b8a5 100644
--- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb
@@ -162,6 +162,17 @@ chip soc/intel/jasperlake
end
end #I2C 0
device pci 15.2 on
+ chip drivers/generic/gpio_keys
+ register "name" = ""PENH""
+ register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_C12)"
+ register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
+ register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
+ register "key.dev_name" = ""EJCT""
+ register "key.linux_code" = "SW_PEN_INSERTED"
+ register "key.linux_input_type" = "EV_SW"
+ register "key.label" = ""pen_eject""
+ device generic 0 on end
+ end
chip drivers/i2c/generic
register "hid" = ""ELAN0001""
register "desc" = ""ELAN Touchscreen""