diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-12-10 09:01:41 -0800 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-09 05:41:59 +0200 |
| commit | 40b7455f9337605b0f3062a6feacb82f43099186 (patch) | |
| tree | c28b591a2cef5e416e32630eaa5b02b57b05f306 /src/mainboard/google | |
| parent | 8b120a87c37c3667e8d19689500a1641fd98143e (diff) | |
rambi: limit SD card controller to 2.0 spec
The rambi board can only meet the SD card 2.0 specification.
Therefore, the controller capabilities need to be overridden
to match.
BUG=chrome-os-partner:24423
BRANCH=None
TEST=Built and booted. /sys/kernel/debug/mmc0/ios shows
high speed as maximum timing as well as 3.3V signal voltage.
Change-Id: Ib3824800852376e0f15a70584917d6692087ccfe
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179415
Reviewed-on: http://review.coreboot.org/4998
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/rambi/devicetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb index 1c24d57d2d..96772ac618 100644 --- a/src/mainboard/google/rambi/devicetree.cb +++ b/src/mainboard/google/rambi/devicetree.cb @@ -27,6 +27,10 @@ chip soc/intel/baytrail register "lpe_codec_clk_freq" = "25" # 25MHz clock register "lpe_codec_clk_num" = "0" # PMC_PLT_CLK[0] + # SD Card controller + register "sdcard_cap_low" = "0x036864b2" + register "sdcard_cap_high" = "0x0" + device cpu_cluster 0 on device lapic 0 on end end |