diff options
| author | Jes B. Klinke <jbk@chromium.org> | 2022-04-19 14:00:33 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2022-04-21 23:07:20 +0000 |
| commit | c6b041a12e56f32be37b809357225e762b070117 (patch) | |
| tree | df09f63531c43eb3c7b8f3727d3726ccdaed035a /src/mainboard/google/volteer | |
| parent | 0b71099f6587e9722e4554c094e5ef1c32195860 (diff) | |
tpm: Refactor TPM Kconfig dimensions
Break TPM related Kconfig into the following dimensions:
TPM transport support:
config CRB_TPM
config I2C_TPM
config SPI_TPM
config MEMORY_MAPPED_TPM (new)
TPM brand, not defining any of these is valid, and result in "generic" support:
config TPM_ATMEL (new)
config TPM_GOOGLE (new)
config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE)
config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE)
What protocol the TPM chip supports:
config MAINBOARD_HAS_TPM1
config MAINBOARD_HAS_TPM2
What the user chooses to compile (restricted by the above):
config NO_TPM
config TPM1
config TPM2
The following Kconfigs will be replaced as indicated:
config TPM_CR50 -> TPM_GOOGLE
config MAINBOARD_HAS_CRB_TPM -> CRB_TPM
config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL
config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE
config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM
config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE
Signed-off-by: Jes B. Klinke <jbk@chromium.org>
Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer')
5 files changed, 9 insertions, 7 deletions
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 28d345729d..682d247300 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -29,12 +29,14 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER select HAVE_SPD_IN_CBFS select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS - select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50 - select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50 + select I2C_TPM if BOARD_GOOGLE_VOLTEER2_TI50 + select SPI_TPM if !BOARD_GOOGLE_VOLTEER2_TI50 select MAINBOARD_HAS_TPM2 select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_TIGERLAKE + select TPM_GOOGLE_TI50 if BOARD_GOOGLE_VOLTEER2_TI50 + select TPM_GOOGLE_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50 config BOARD_GOOGLE_DELBIN select BOARD_GOOGLE_BASEBOARD_VOLTEER diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index 7089dddc02..91fe319b92 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -84,7 +84,7 @@ static void mainboard_enable(struct device *dev) void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg) { int ret; - if (!CONFIG(MAINBOARD_HAS_SPI_TPM_CR50)) { + if (!CONFIG(TPM_GOOGLE_CR50) || !CONFIG(SPI_TPM)) { /* * Negotiation of long interrupt pulses is only supported via SPI. I2C is only * used on reworked prototypes on which the TPM is replaced with Dauntless under diff --git a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb index b69990c24a..763a5ee893 100644 --- a/src/mainboard/google/volteer/variants/chronicler/overridetree.cb +++ b/src/mainboard/google/volteer/variants/chronicler/overridetree.cb @@ -29,7 +29,7 @@ chip soc/intel/tigerlake register "common_soc_config" = "{ .gspi[0] = { .speed_mhz = 1, - .early_init = CONFIG(MAINBOARD_HAS_SPI_TPM_CR50), + .early_init = CONFIG(SPI_TPM), }, .i2c[0] = { .speed = I2C_SPEED_FAST, diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index d024835aa0..b6657a1576 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -22,14 +22,14 @@ chip soc/intel/tigerlake register "common_soc_config" = "{ .gspi[0] = { .speed_mhz = 1, - .early_init = CONFIG(MAINBOARD_HAS_SPI_TPM_CR50), + .early_init = CONFIG(SPI_TPM), }, .i2c[0] = { .speed = I2C_SPEED_FAST, }, .i2c[1] = { .speed = I2C_SPEED_FAST, - .early_init = CONFIG(MAINBOARD_HAS_I2C_TPM_CR50), + .early_init = CONFIG(I2C_TPM), }, .i2c[2] = { .speed = I2C_SPEED_FAST, diff --git a/src/mainboard/google/volteer/variants/volteer2/variant.c b/src/mainboard/google/volteer/variants/volteer2/variant.c index 442402779d..c9129b242d 100644 --- a/src/mainboard/google/volteer/variants/volteer2/variant.c +++ b/src/mainboard/google/volteer/variants/volteer2/variant.c @@ -20,6 +20,6 @@ static void devtree_enable_i2c_tpm(void) void variant_devtree_update(void) { - if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50)) + if (CONFIG(I2C_TPM)) devtree_enable_i2c_tpm(); } |