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authorFelix Singer <felixsinger@posteo.net>2024-06-28 06:28:43 +0200
committerFelix Singer <felixsinger@posteo.net>2024-07-05 20:55:19 +0000
commit9b31a90e7fda68ad1b03b65fc295fad9a6a3986f (patch)
treef72076897adbcea0a11db50d240b2bdc6d69bba8 /src/mainboard/google/volteer/variants/elemi/overridetree.cb
parentd9cb2c12d7f6fde26b736fe5fe1ca3f5142b1f18 (diff)
tgl mainboards: Move PCIe root port settings into their device scope
Change-Id: I110cc95d536cb0fd3b5db85b84cca7a96e31401c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83253 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/elemi/overridetree.cb')
-rw-r--r--src/mainboard/google/volteer/variants/elemi/overridetree.cb14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/google/volteer/variants/elemi/overridetree.cb b/src/mainboard/google/volteer/variants/elemi/overridetree.cb
index 5eef9ef177..7fa38bf6fd 100644
--- a/src/mainboard/google/volteer/variants/elemi/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/elemi/overridetree.cb
@@ -5,12 +5,6 @@ chip soc/intel/tigerlake
register "DdiPort2Hpd" = "0"
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E10, .pad_auxn_dc = GPP_E13}"
- # EMMC PCIE 5 using clk 5
- register "PcieRpLtrEnable[4]" = "1"
- register "PcieRpHotPlug[4]" = "1"
- register "PcieClkSrcUsage[5]" = "4"
- register "PcieClkSrcClkReq[5]" = "5"
-
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
@@ -275,7 +269,13 @@ chip soc/intel/tigerlake
device generic 0 on end
end
end
- device ref pcie_rp5 on end
+ device ref pcie_rp5 on
+ # EMMC PCIE 5 using clk 5
+ register "PcieRpLtrEnable[4]" = "1"
+ register "PcieRpHotPlug[4]" = "1"
+ register "PcieClkSrcUsage[5]" = "4"
+ register "PcieClkSrcClkReq[5]" = "5"
+ end
device ref pmc hidden
# The pmc_mux chip driver is a placeholder for the
# PMC.MUX device in the ACPI hierarchy.