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authorFelix Singer <felixsinger@posteo.net>2021-12-05 02:45:51 +0100
committerFelix Singer <felixsinger@posteo.net>2021-12-09 21:53:58 +0000
commit8474f4dc9bfd46bcb111cd3257006057b46d7f08 (patch)
treeb838a509b572a575c18a65c349d685dab01bcb86 /src/mainboard/google/volteer/variants/baseboard/devicetree.cb
parent83d54c30fae74a869288e38ad782c384b1621b6b (diff)
soc/intel/tigerlake: Drop unused SataEnable setting
`SataEnable` is set by some boards, but it doesn't have any effect since its related FSP option is hooked up to the devicetree state. Thus, drop it. Change-Id: Id645bfcade7ca1d495fb8df538113b3d10392a82 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/volteer/variants/baseboard/devicetree.cb')
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index eee29ef2ce..ca9661f09f 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -146,7 +146,6 @@ chip soc/intel/tigerlake
register "PcieClkSrcUsage[6]" = "PCIE_CLK_NOTUSED"
# Enable SATA
- register "SataEnable" = "1"
register "SataMode" = "0"
register "SataSalpSupport" = "1"
register "SataPortsEnable[0]" = "0"