summaryrefslogtreecommitdiff
path: root/src/mainboard/google/veyron_rialto/memlayout.ld
diff options
context:
space:
mode:
authorFrans Hendriks <fhendriks@eltan.com>2019-03-18 13:31:56 +0100
committerNico Huber <nico.h@gmx.de>2019-03-18 16:18:45 +0000
commitad5e0a8e65b391706ed04227214f1d4eb4f63763 (patch)
tree463bba60fffe97a110dd78df6881b295e6db4f92 /src/mainboard/google/veyron_rialto/memlayout.ld
parentbd74aaf534e46a38e50a2db03df58b28cae8ed96 (diff)
soc/intel/braswell: Reserve IOAPIC and ROM resources
The mmio resouces IOAPIC and ROM area not reserved. Reserve IOAPIC and ROM resources. BUG=N/A TEST=Intel CherryHill CRB booting Embedded Linux Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29423 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/google/veyron_rialto/memlayout.ld')
0 files changed, 0 insertions, 0 deletions