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author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-31 18:12:53 -0700 |
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committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-06-02 17:15:41 +0200 |
commit | d52f2580e7b4b735d725d7d1e5a11a5ba93ced5c (patch) | |
tree | c989cdfdcb9a1bf471245361ea13bce68e8c1613 /src/mainboard/google/urara | |
parent | c5b758bec803957455a460503547c5846917ae08 (diff) |
drivers/intel/fsp1_1: Update weak MRC cache routines
Update the weak functions for the MRC cache.
TEST=Build and run on Galileo Gen2
Change-Id: I54a1252cfff1a2f68b163f0feb65e2bceb37f6a9
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15042
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/urara')
0 files changed, 0 insertions, 0 deletions