Add/Combine Haswell Chromebooks using variant board scheme

Combine existing boards google/falco and google/peppy with new
ChromeOS devices leon and wolf, using their common reference board
(slippy) as a base.

Chromium sources used:
firmware-falco_peppy-4389.81.B d7703cac [falco: Add support for Samsung...]
firmware-leon-4389.61.B ea1bf55 [haswell: Enable 2x Refresh Mode]
firmware-wolf-4389.24.B 7c5a9c2 [Wolf: haswell: Add small delay before...]

Additionally, some minor cleanup/changes were made:
- I2C devices set to use ACPI (vs PCI) mode
- I2C device ACPI entries adjusted as per above
- I2C devices set to use level (vs edge) interrupt triggering
- XHCI finalization enabled in devicetree
- HDA verb entries use simplified macro entry format

Existing google/falco and google/peppy boards will be removed in a
subsequent commit.

Variant setup modeled after google/beltino

Change-Id: I087df5f98c1bb4ddd0ab24ee9ff786a9d38d87be
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17621
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

3 files changed, 225 insertions, 0 deletions

diff --git a/src/mainboard/google/slippy/variants/falco/include/variant/acpi/mainboard.asl b/src/mainboard/google/slippy/variants/falco/include/variant/acpi/mainboard.asl
new file mode 100644
index 0000000000..417dbfee94
--- /dev/null
+++ b/src/mainboard/google/slippy/variants/falco/include/variant/acpi/mainboard.asl
@@ -0,0 +1,84 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <onboard.h>
+
+Scope (\_SB)
+{
+	Device (LID0)
+	{
+		Name(_HID, EisaId("PNP0C0D"))
+		Method(_LID, 0)
+		{
+			Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
+			Return (\LIDS)
+		}
+	}
+
+	Device (PWRB)
+	{
+		Name(_HID, EisaId("PNP0C0C"))
+	}
+}
+
+Scope (\_SB.PCI0.I2C0)
+{
+	Device (CTPA)
+	{
+		Name (_HID, "CYAP0000")
+		Name (_DDN, "Cypress Touchpad")
+		Name (_UID, 3)
+		Name (ISTP, 1) // Touchpad
+
+		Name (_CRS, ResourceTemplate()
+		{
+			I2cSerialBus (
+				0x67,                     // SlaveAddress
+				ControllerInitiated,      // SlaveMode
+				400000,                   // ConnectionSpeed
+				AddressingMode7Bit,       // AddressingMode
+				"\\_SB.PCI0.I2C0"        // ResourceSource
+			)
+			Interrupt (ResourceConsumer, Edge, ActiveLow)
+			{
+				BOARD_TRACKPAD_IRQ
+			}
+		})
+
+		Method (_STA)
+		{
+			If (LEqual (\S1EN, 1)) {
+				Return (0xF)
+			} Else {
+				Return (0x0)
+			}
+		}
+
+		Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
+
+		Method (_DSW, 3, NotSerialized)
+		{
+			Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
+			If (LEqual (Arg0, 1)) {
+				// Enable GPIO as wake source
+				\_SB.PCI0.LPCB.GWAK (Local0)
+			}
+		}
+
+		// Allow device to power off in S0
+		Name (_S0W, 4)
+	}
+}
diff --git a/src/mainboard/google/slippy/variants/falco/include/variant/gpio.h b/src/mainboard/google/slippy/variants/falco/include/variant/gpio.h
new file mode 100644
index 0000000000..c35b81eea4
--- /dev/null
+++ b/src/mainboard/google/slippy/variants/falco/include/variant/gpio.h
@@ -0,0 +1,120 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef FALCO_GPIO_H
+#define FALCO_GPIO_H
+
+struct pch_lp_gpio_map;
+
+const struct pch_lp_gpio_map mainboard_gpio_map[] = {
+	LP_GPIO_UNUSED,        /* 0: UNUSED */
+	LP_GPIO_UNUSED,        /* 1: UNUSED */
+	LP_GPIO_UNUSED,        /* 2: UNUSED */
+	LP_GPIO_UNUSED,        /* 3: UNUSED */
+	LP_GPIO_NATIVE,        /* 4: NATIVE: I2C0_SDA_GPIO4 */
+	LP_GPIO_NATIVE,        /* 5: NATIVE: I2C0_SCL_GPIO5 */
+	LP_GPIO_NATIVE,        /* 6: NATIVE: I2C1_SDA_GPIO6 */
+	LP_GPIO_NATIVE,        /* 7: NATIVE: I2C1_SCL_GPIO7 */
+	LP_GPIO_ACPI_SCI,      /* 8: LTE_WAKE_L_Q */
+	LP_GPIO_INPUT,         /* 9: RAM_ID1 */
+	LP_GPIO_ACPI_SCI,      /* 10: WLAN_WAKE_L_Q */
+	LP_GPIO_UNUSED,        /* 11: UNUSED */
+	LP_GPIO_INPUT_INVERT,  /* 12: TRACKPAD_INT_L (WAKE) */
+	LP_GPIO_INPUT,         /* 13: RAM_ID0 */
+	LP_GPIO_INPUT,         /* 14: EC_IN_RW */
+	LP_GPIO_UNUSED,        /* 15: UNUSED (STRAP) */
+	LP_GPIO_UNUSED,        /* 16: UNUSED */
+	LP_GPIO_UNUSED,        /* 17: UNUSED */
+	LP_GPIO_NATIVE,        /* 18: PCIE_CLKREQ_WLAN# */
+	LP_GPIO_UNUSED,        /* 19: UNUSED */
+	LP_GPIO_UNUSED,        /* 20: UNUSED */
+	LP_GPIO_UNUSED,        /* 21: UNUSED */
+	LP_GPIO_UNUSED,        /* 22: UNUSED */
+	LP_GPIO_UNUSED,        /* 23: UNUSED */
+	LP_GPIO_UNUSED,        /* 24: UNUSED */
+	LP_GPIO_INPUT_INVERT,  /* 25: TOUCH_INT_L (WAKE) */
+	LP_GPIO_UNUSED,        /* 26: UNUSED */
+	LP_GPIO_UNUSED,        /* 27: UNUSED */
+	LP_GPIO_UNUSED,        /* 28: UNUSED */
+	LP_GPIO_UNUSED,        /* 29: UNUSED */
+	LP_GPIO_NATIVE,        /* 30: NATIVE: PCH_SUSWARN_L */
+	LP_GPIO_NATIVE,        /* 31: NATIVE: ACPRESENT */
+	LP_GPIO_NATIVE,        /* 32: NATIVE: LPC_CLKRUN_L */
+	LP_GPIO_NATIVE,        /* 33: NATIVE: DEVSLP0 */
+	LP_GPIO_ACPI_SMI,      /* 34: EC_SMI_L */
+	LP_GPIO_ACPI_SMI,      /* 35: PCH_NMI_DBG_L (route in NMI_EN) */
+	LP_GPIO_ACPI_SCI,      /* 36: EC_SCI_L */
+	LP_GPIO_UNUSED,        /* 37: UNUSED */
+	LP_GPIO_UNUSED,        /* 38: UNUSED */
+	LP_GPIO_UNUSED,        /* 39: UNUSED */
+	LP_GPIO_NATIVE,        /* 40: NATIVE: USB_OC0# */
+	LP_GPIO_UNUSED,        /* 41: UNUSED */
+	LP_GPIO_UNUSED,        /* 42: UNUSED */
+	LP_GPIO_NATIVE,        /* 43: NATIVE: USB_OC3# */
+	LP_GPIO_UNUSED,        /* 44: UNUSED */
+	LP_GPIO_UNUSED,        /* 45: UNUSED */
+	LP_GPIO_OUT_HIGH,      /* 46: WLAN_DISABLE_L */
+	LP_GPIO_INPUT,         /* 47: RAM_ID2 */
+	LP_GPIO_UNUSED,        /* 48: UNUSED */
+	LP_GPIO_UNUSED,        /* 49: UNUSED */
+	LP_GPIO_UNUSED,        /* 50: UNUSED */
+	LP_GPIO_INPUT,         /* 51: ALS_INT_L */
+	LP_GPIO_INPUT,         /* 52: SIM_DET */
+	LP_GPIO_PIRQ,          /* 53: TRACKPAD_INT_DX (PIRQV) */
+	LP_GPIO_PIRQ,          /* 54: TOUCH_INT_L_DX (PIRQW) */
+	LP_GPIO_UNUSED,        /* 55: UNUSED */
+	LP_GPIO_UNUSED,        /* 56: UNUSED */
+	LP_GPIO_UNUSED,        /* 57: UNUSED */
+	LP_GPIO_INPUT,         /* 58: PCH_SPI_WP_D */
+	LP_GPIO_OUT_HIGH,      /* 59: LTE_DISABLE_L */
+	LP_GPIO_NATIVE,        /* 60: NATIVE: SML0ALERT */
+	LP_GPIO_UNUSED,        /* 61: UNUSED */
+	LP_GPIO_UNUSED,        /* 62: UNUSED */
+	LP_GPIO_NATIVE,        /* 63: NATIVE: PCH_SLP_S5_L */
+	LP_GPIO_UNUSED,        /* 64: UNUSED */
+	LP_GPIO_UNUSED,        /* 65: UNUSED */
+	LP_GPIO_UNUSED,        /* 66: UNUSED (STRAP) */
+	LP_GPIO_UNUSED,        /* 67: UNUSED */
+	LP_GPIO_UNUSED,        /* 68: UNUSED */
+	LP_GPIO_UNUSED,        /* 69: UNUSED */
+	LP_GPIO_UNUSED,        /* 70: UNUSED */
+	LP_GPIO_NATIVE,        /* 71: NATIVE: MODPHY_EN */
+	LP_GPIO_UNUSED,        /* 72: UNUSED */
+	LP_GPIO_UNUSED,        /* 73: UNUSED */
+	LP_GPIO_NATIVE,        /* 74: NATIVE: SMB_ME1_DAT */
+	LP_GPIO_NATIVE,        /* 75: NATIVE: SMB_ME1_CLK */
+	LP_GPIO_UNUSED,        /* 76: UNUSED */
+	LP_GPIO_UNUSED,        /* 77: UNUSED */
+	LP_GPIO_UNUSED,        /* 78: UNUSED */
+	LP_GPIO_UNUSED,        /* 79: UNUSED */
+	LP_GPIO_UNUSED,        /* 80: UNUSED */
+	LP_GPIO_NATIVE,        /* 81: NATIVE: SPKR */
+	LP_GPIO_NATIVE,        /* 82: NATIVE: EC_RCIN_L */
+	LP_GPIO_UNUSED,        /* 83: UNUSED */
+	LP_GPIO_UNUSED,        /* 84: UNUSED */
+	LP_GPIO_UNUSED,        /* 85: UNUSED */
+	LP_GPIO_UNUSED,        /* 86: UNUSED (STRAP) */
+	LP_GPIO_UNUSED,        /* 87: UNUSED */
+	LP_GPIO_UNUSED,        /* 88: UNUSED */
+	LP_GPIO_UNUSED,        /* 89: UNUSED */
+	LP_GPIO_UNUSED,        /* 90: UNUSED */
+	LP_GPIO_UNUSED,        /* 91: UNUSED */
+	LP_GPIO_UNUSED,        /* 92: UNUSED */
+	LP_GPIO_UNUSED,        /* 93: UNUSED */
+	LP_GPIO_UNUSED,        /* 94: UNUSED */
+	LP_GPIO_END
+};
+
+#endif
diff --git a/src/mainboard/google/slippy/variants/falco/include/variant/mainboard.h b/src/mainboard/google/slippy/variants/falco/include/variant/mainboard.h
new file mode 100644
index 0000000000..6329a27805
--- /dev/null
+++ b/src/mainboard/google/slippy/variants/falco/include/variant/mainboard.h
@@ -0,0 +1,21 @@
+/*
+* This file is part of the coreboot project.
+*
+* Copyright 2013 Google Inc.
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; version 2 of the License.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*/
+
+#ifndef __MAINBOARD_H_
+#define __MAINBOARD_H_
+void mainboard_train_link(struct intel_dp *intel_dp);
+void mainboard_set_port_clk_dp(struct intel_dp *intel_dp);
+
+#endif