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authorJon Murphy <jpmurphy@google.com>2022-02-16 06:46:47 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-02-26 00:17:25 +0000
commit2a7445a165125863446b87744700f59fdc72ba37 (patch)
treeb6c350f25926dc40a376ca9f1d939a472e120abd /src/mainboard/google/skyrim/variants
parentcbf0f98c6179c6f57080d44355e766221ca92669 (diff)
mb/google/skyrim: Add smihandler
BUG=b:214415408 TEST=builds BRANCH=none Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Icc52182294bb3402463a0a70a5c67779c60dfe32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62045 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/skyrim/variants')
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/Makefile.inc2
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/gpio.c11
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h3
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/smihandler.c26
4 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc b/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc
index 9fb63f5f43..7c092e44c2 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc
+++ b/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc
@@ -1,3 +1,5 @@
bootblock-y += gpio.c
ramstage-y += gpio.c
+
+smm-y += gpio.c
diff --git a/src/mainboard/google/skyrim/variants/baseboard/gpio.c b/src/mainboard/google/skyrim/variants/baseboard/gpio.c
index 841a572401..6e079d0380 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/gpio.c
+++ b/src/mainboard/google/skyrim/variants/baseboard/gpio.c
@@ -141,6 +141,11 @@ static const struct soc_amd_gpio base_gpio_table[] = {
PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE),
};
+/* GPIO configuration for sleep */
+static const struct soc_amd_gpio sleep_gpio_table[] = {
+ /* TODO: Fill sleep gpio configuration */
+};
+
/* Early GPIO configuration in bootblock */
static const struct soc_amd_gpio bootblock_gpio_table[] = {
/* TODO: Fill bootblock gpio configuration */
@@ -163,3 +168,9 @@ __weak void variant_bootblock_gpio_table(const struct soc_amd_gpio **gpio, size_
*size = ARRAY_SIZE(bootblock_gpio_table);
*gpio = bootblock_gpio_table;
}
+
+__weak void variant_sleep_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
+{
+ *size = ARRAY_SIZE(sleep_gpio_table);
+ *gpio = sleep_gpio_table;
+}
diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h
index 725baf8b08..b83344894e 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h
@@ -22,4 +22,7 @@ void variant_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
/* This function provides GPIO init in bootblock. */
void variant_bootblock_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
+/* This function provides GPIO settings before entering sleep. */
+void variant_sleep_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
+
#endif /* __BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/google/skyrim/variants/baseboard/smihandler.c b/src/mainboard/google/skyrim/variants/baseboard/smihandler.c
new file mode 100644
index 0000000000..f5131e9461
--- /dev/null
+++ b/src/mainboard/google/skyrim/variants/baseboard/smihandler.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/smm.h>
+#include <variant/ec.h>
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+ size_t num_gpios;
+ const struct soc_amd_gpio *gpios;
+
+ chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
+
+ variant_sleep_gpio_table(&gpios, &num_gpios);
+ program_gpios(gpios, num_gpios);
+}
+
+int mainboard_smi_apmc(u8 apmc)
+{
+ chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
+
+ return 0;
+}