diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-06-13 15:57:06 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-23 21:18:25 +0000 |
| commit | ff01bca624283ba149c90a32d8f5655f27749a85 (patch) | |
| tree | 9f4a2acbcd62ea69b726b0034808ade61f1b4483 /src/mainboard/google/sarien | |
| parent | ad489b8a2719e85933e21b14dede0a7f5833bcf9 (diff) | |
ChromeOS: Refactor ACPI CNVS generation
Remove chromeos_dsdt_generator() calls under mainboard, it
is possible to make the single call to fill \CNVS and
\OIPG without leveraging device operations.
Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/sarien')
| -rw-r--r-- | src/mainboard/google/sarien/ramstage.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c index 6287628a88..8d619db5a7 100644 --- a/src/mainboard/google/sarien/ramstage.c +++ b/src/mainboard/google/sarien/ramstage.c @@ -5,7 +5,6 @@ #include <smbios.h> #include <soc/gpio.h> #include <variant/gpio.h> -#include <vendorcode/google/chromeos/chromeos.h> #if CONFIG(GENERATE_SMBIOS_TABLES) /* mainboard silk screen shows DIMM-A and DIMM-B */ @@ -46,12 +45,6 @@ static void mainboard_init(void *chip_info) gpio_configure_pads(gpio_unused, ARRAY_SIZE(gpio_unused)); } -static void mainboard_enable(struct device *dev) -{ - dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; -} - struct chip_operations mainboard_ops = { .init = mainboard_init, - .enable_dev = mainboard_enable, }; |