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author | Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> | 2021-12-08 15:29:40 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-10 15:57:00 +0000 |
commit | acb17fec34a609c5b674ad0d2af04d47800530e2 (patch) | |
tree | c7c6899ed0277679eadbe88ce67fd9e7e361775a /src/mainboard/google/sarien/chromeos.c | |
parent | 92226dc6c3a769c0ba107b002ae05aee907b14e2 (diff) |
mb/google/brya/var/taeko: Fix PLD group order (W/A)
In commit 667471b8d8 (ec/google/chromeec: Add PLD to EC conn in ACPI
table), PLD is added to ACPI table. It causes the DUT to not boot into
the OS. So fix the USB3/USB2 Type-C Port C2 PLD group order from 3 to 2
to solve this issue.
Fixes: 667471b8d8 ("ec/google/chromeec: Add PLD to EC conn in ACPI table")
BUG=b:209723556
BRANCH=none
TEST=build coreboot and boot into OS.
Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com>
Change-Id: Ia4cf2d735de524ae721800600536923d1d47f04b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59973
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/sarien/chromeos.c')
0 files changed, 0 insertions, 0 deletions