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authorIvy Jian <ivy.jian@quanta.corp-partner.google.com>2022-09-05 14:30:11 +0800
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-09-20 07:56:22 +0000
commit61e5816b26e62f4b53d82bb8f3d1c17a3d202610 (patch)
treed6269a085daec0966078e87d558bdae30fd7bce4 /src/mainboard/google/rex
parentd4eb998fc17266a9671c15f6d11f039b8a5e72d6 (diff)
mb/google/rex: Add WWAN ACPI support
Add FM350GL 5G WWAN support using drivers/wwan/fm and additional PM features from RTD3. BUG=b:244077118 TEST=check cbmem -c \_SB.PCI0.RP06: Enable RTD3 for PCI: 00:1c.5 (Intel PCIe Runtime D3) \_SB.PCI0.RP06: Enable WWAN for PCI: 00:1c.5 (Fibocom FM-350-GL) check PXSX Device is generated in ssdt. Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Change-Id: I6114c589769d2eca882cf1a5255cf4c5937121a6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67336 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/rex')
-rw-r--r--src/mainboard/google/rex/Kconfig1
-rw-r--r--src/mainboard/google/rex/variants/rex0/overridetree.cb17
2 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig
index bff688f232..1286a79c29 100644
--- a/src/mainboard/google/rex/Kconfig
+++ b/src/mainboard/google/rex/Kconfig
@@ -23,6 +23,7 @@ config BOARD_GOOGLE_BASEBOARD_REX
def_bool n
select BOARD_GOOGLE_REX_COMMON
select DRIVERS_INTEL_PMC
+ select DRIVERS_WWAN_FM350GL
select MAINBOARD_HAS_CHROMEOS
select MEMORY_SOLDERDOWN
select SOC_INTEL_METEORLAKE
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index cab839489b..43707bf85e 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -265,6 +265,23 @@ chip soc/intel/meteorlake
.clk_req = 3,
.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
}"
+ chip soc/intel/common/block/pcie/rtd3
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C05)"
+ register "reset_off_delay_ms" = "20"
+ register "srcclk_pin" = "3"
+ register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
+ register "skip_on_off_support" = "true"
+ device generic 0 alias rp6_rtd3 on end
+ end
+ chip drivers/wwan/fm
+ register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E07)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A15)"
+ register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C05)"
+ register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F10)"
+ register "add_acpi_dma_property" = "true"
+ use rp6_rtd3 as rtd3dev
+ device generic 0 on end
+ end
end #PCIE6 WWAN card
device ref gspi1 on end
device ref soc_espi on