summaryrefslogtreecommitdiff
path: root/src/mainboard/google/rex/variants/ovis/overridetree.cb
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2023-06-30 22:47:34 -0700
committerSubrata Banik <subratabanik@google.com>2023-07-02 22:31:41 +0000
commitd44e08ad9f183f0ed92fb35ed52e92baf5022f37 (patch)
tree062a72bf133e8c76a3c4585a1eaa7d1bf496ac3c /src/mainboard/google/rex/variants/ovis/overridetree.cb
parent9d8baea15cbbda7376b82909493f3f96c1f49089 (diff)
mb/google/rex/var/ovis: Enable LAN0
This patch performs below operations to enable LAN0. - Complete the LAN PEREST power sequencing - Program the SRC_CLKREQ (GPP_D20) with correctly. - Add overridetree.cb entry to configure the LAN0 device. BUG=b:289395519 TEST=Able to boot google/ovis with LAN0 being enabled. Change-Id: I91b0a76395ade4459cf8705c333728a71f95df14 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76213 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rex/variants/ovis/overridetree.cb')
-rw-r--r--src/mainboard/google/rex/variants/ovis/overridetree.cb9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/rex/variants/ovis/overridetree.cb b/src/mainboard/google/rex/variants/ovis/overridetree.cb
index 259aaf5c2e..112072cb97 100644
--- a/src/mainboard/google/rex/variants/ovis/overridetree.cb
+++ b/src/mainboard/google/rex/variants/ovis/overridetree.cb
@@ -63,7 +63,14 @@ chip soc/intel/meteorlake
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
end #PCIE7 LAN1 card
-
+ device ref pcie_rp10 on
+ # Enable LAN0 Card PCIE 10 using clk 8
+ register "pcie_rp[PCH_RP(10)]" = "{
+ .clk_src = 8,
+ .clk_req = 8,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ end #PCIE10 LAN0 card
device ref pcie_rp11 on
# Enable SSD Card PCIE 11 using clk 7
register "pcie_rp[PCH_RP(11)]" = "{