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authorEric Lai <eric_lai@quanta.corp-partner.google.com>2023-06-16 09:26:18 +0800
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2023-06-17 02:37:47 +0000
commit884a70b379258f1b9186299b0fff5afe63ce32db (patch)
treee4f3cc245b8993476d05ecebb42e89734bf2e907 /src/mainboard/google/rex/variants/ovis/overridetree.cb
parent8e38a67baca1a917cdc2c1383ad0b6c44563baca (diff)
soc/intel/meteorlake: Update tcss_usb3 alias
TCSS and TBT use the same lane on schematic. Update the port start from 0 to match the Intel schematic. You can better follow the it without convert the port number. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ic6631dcbbd9f6c79c756b015425e2da778eb395e Reviewed-on: https://review.coreboot.org/c/coreboot/+/75892 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/rex/variants/ovis/overridetree.cb')
-rw-r--r--src/mainboard/google/rex/variants/ovis/overridetree.cb18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/rex/variants/ovis/overridetree.cb b/src/mainboard/google/rex/variants/ovis/overridetree.cb
index bb138334cb..e15a7c4f5a 100644
--- a/src/mainboard/google/rex/variants/ovis/overridetree.cb
+++ b/src/mainboard/google/rex/variants/ovis/overridetree.cb
@@ -67,21 +67,21 @@ chip soc/intel/meteorlake
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, CENTER, ACPI_PLD_GROUP(1, 1))"
register "custom_pld.vertical_position" = "PLD_VERTICAL_POSITION_LOWER"
- device ref tcss_usb3_port1 on end
+ device ref tcss_usb3_port0 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C1""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(2, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(1, 2))"
- device ref tcss_usb3_port3 on end
+ device ref tcss_usb3_port2 on end
end
end
end
@@ -89,19 +89,19 @@ chip soc/intel/meteorlake
device ref tcss_dma0 on
chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
- use tcss_usb3_port1 as dfp[0].typec_port
+ use tcss_usb3_port0 as dfp[0].typec_port
device generic 0 on end
end
chip drivers/intel/usb4/retimer
register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
- use tcss_usb3_port2 as dfp[1].typec_port
+ use tcss_usb3_port1 as dfp[1].typec_port
device generic 0 on end
end
end
device ref tcss_dma1 on
chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)"
- use tcss_usb3_port3 as dfp[0].typec_port
+ use tcss_usb3_port2 as dfp[0].typec_port
device generic 0 on end
end
end
@@ -197,17 +197,17 @@ chip soc/intel/meteorlake
device generic 0 on
chip drivers/intel/pmc_mux/conn
use usb2_port2 as usb2_port
- use tcss_usb3_port1 as usb3_port
+ use tcss_usb3_port0 as usb3_port
device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
use usb2_port1 as usb2_port
- use tcss_usb3_port2 as usb3_port
+ use tcss_usb3_port1 as usb3_port
device generic 1 alias conn1 on end
end
chip drivers/intel/pmc_mux/conn
use usb2_port3 as usb2_port
- use tcss_usb3_port3 as usb3_port
+ use tcss_usb3_port2 as usb3_port
device generic 2 alias conn2 on end
end
end