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authorJohnson Wang <johnson.wang@mediatek.corp-partner.google.com>2023-02-08 09:46:21 +0800
committerRex-BC Chen <rex-bc.chen@mediatek.com>2023-02-22 03:18:17 +0000
commitfb660c35b507e6d7775c0647bc267d0294bf172d (patch)
treeb7fca7408df5daa6b233e34a7ae25a252f6e6425 /src/mainboard/google/poppy/variants/baseboard
parented2b6a5a17fd71e6069f3aa017341694e77df777 (diff)
soc/mediatek/mt8188: Fix audio sampling rate
The current clock register definition is wrong, which results in wrong audio sampling rate. Fix it by adjusting the POSTDIV registers of APLL1-APLL5. TEST=build pass BUG=b:250459803, b:250464574 Change-Id: I7a627169593f41906856777d738c6b13ff72d5a0 Signed-off-by: Johnson Wang <johnson.wang@mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73134 Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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