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| author | Johnny Lin <johnny_lin@wiwynn.com> | 2020-11-12 09:17:14 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-16 11:03:00 +0000 |
| commit | c6b77d5bf61df8bb0489a841008aa5d2d1ab6d83 (patch) | |
| tree | f2cfbec7ecd7162ccd15bb682f30f79d344f85c0 /src/mainboard/google/nyan_blaze/bct/sdram-hynix-C-2GB-792.inc | |
| parent | 863b3ad45b84485561e9bc48ef6560b95fab43ad (diff) | |
vc/intel/fsp/fsp2_0/cooperlake_sp: Fix WW45 FSP Memory map HOB mismatch
Tested=On OCP Delta Lake, verify the memory map hob data are correct.
Change-Id: I86bd809e21270395c4115788e5521606e9dcc2fb
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/nyan_blaze/bct/sdram-hynix-C-2GB-792.inc')
0 files changed, 0 insertions, 0 deletions