summaryrefslogtreecommitdiff
path: root/src/mainboard/google/jecht
diff options
context:
space:
mode:
authorHsuan-ting Chen <roccochen@google.com>2021-10-07 06:21:28 +0000
committerFelix Held <felix-coreboot@felixheld.de>2021-10-15 13:00:32 +0000
commitadb393bdd6cd6734fa2672bd174aca4588a68016 (patch)
tree584f20ba1cadcb3b36c856d501d4a7b3d4eeb047 /src/mainboard/google/jecht
parent82130369a1c8b06b0aa5e804096d93b98ffce7cc (diff)
Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"
This reverts commit 6260bf712a836762b18d80082505e981e040f4bc. Reason for revert: This CL did not handle Intel GPIO correctly. We need to add GPIO_EC_IN_RW into early_gpio_table for platforms using Intel SoC. Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Change-Id: Iaeb1bf598047160f01e33ad0d9d004cad59e3f75 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57951 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/jecht')
-rw-r--r--src/mainboard/google/jecht/chromeos.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c
index bc00994a44..cf59636073 100644
--- a/src/mainboard/google/jecht/chromeos.c
+++ b/src/mainboard/google/jecht/chromeos.c
@@ -67,10 +67,3 @@ void mainboard_chromeos_acpi_generate(void)
{
chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
}
-
-int get_ec_is_trusted(void)
-{
- /* Do not have a Chrome EC involved in entering recovery mode;
- Always return trusted. */
- return 1;
-}