diff options
| author | T Michael Turney <quic_mturney@quicinc.com> | 2022-01-20 11:55:40 -0800 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-02-15 01:11:26 +0000 |
| commit | d43e688ed2fe94ed429658ced02764527af8cb0f (patch) | |
| tree | 0aa30c2b7c70530f2ce5e9a56b412d08719f40ba /src/mainboard/google/herobrine/chromeos.fmd | |
| parent | 02b2afa8e9dacf0dfdd730902ead02580596df65 (diff) | |
drivers: spi_flash: Addressing mode change for SPI NOR
As 4-byte addressing mode is not support in coreboot, change the
addressing mode of SPI NOR from 4-bytes to 3-bytes.
BUG=b:215605946
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com>
Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Change-Id: Ied5b647d0fcc8e3effff3bb7c8680ed5a0c1f3d4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/mainboard/google/herobrine/chromeos.fmd')
0 files changed, 0 insertions, 0 deletions