diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-06-13 15:57:06 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-23 21:18:25 +0000 |
| commit | ff01bca624283ba149c90a32d8f5655f27749a85 (patch) | |
| tree | 9f4a2acbcd62ea69b726b0034808ade61f1b4483 /src/mainboard/google/hatch | |
| parent | ad489b8a2719e85933e21b14dede0a7f5833bcf9 (diff) | |
ChromeOS: Refactor ACPI CNVS generation
Remove chromeos_dsdt_generator() calls under mainboard, it
is possible to make the single call to fill \CNVS and
\OIPG without leveraging device operations.
Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch')
| -rw-r--r-- | src/mainboard/google/hatch/ramstage.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/ramstage.c b/src/mainboard/google/hatch/ramstage.c index 93864b2ad1..86065f95d3 100644 --- a/src/mainboard/google/hatch/ramstage.c +++ b/src/mainboard/google/hatch/ramstage.c @@ -6,7 +6,6 @@ #include <soc/gpio.h> #include <soc/ramstage.h> #include <variant/gpio.h> -#include <vendorcode/google/chromeos/chromeos.h> void mainboard_silicon_init_params(FSPS_UPD *supd) { @@ -36,7 +35,6 @@ static void mainboard_init(struct device *dev) static void mainboard_enable(struct device *dev) { dev->ops->init = mainboard_init; - dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; variant_mainboard_enable(dev); } |