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author | Bernardo Perez Priego <bernardo.perez.priego@intel.com> | 2021-10-20 21:13:29 -0700 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-11-15 23:02:55 +0000 |
commit | aba1c13581595bdcc38c6d38d0e6613e632035a3 (patch) | |
tree | a21196483dd34a5b6278a9f1a218ab42711c2c63 /src/mainboard/google/guybrush/spi_speeds.c | |
parent | b0d48ed88bba7f3700df120bd8aeb1eadec7d1b4 (diff) |
soc/intel/alderlake: Fix build failure with enabled CSE stitching
The following error is observed when building coreboot with CSE stitching
enabled.
`src/soc/intel/alderlake/Makefile.inc:62: *** missing separator. Stop.`
This change prevents such error.
BUG=None
TEST=Enable CSE stitching, build should complete successfully.
Change-Id: I1d9f442d1e1e7be4e8bbd1e653ed0ae6b7475f45
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/guybrush/spi_speeds.c')
0 files changed, 0 insertions, 0 deletions