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author | Werner Zeh <werner.zeh@siemens.com> | 2022-05-05 14:56:07 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-24 13:07:34 +0000 |
commit | 0c78f4c05a220cd7475ce2430ef28d31ef2922b3 (patch) | |
tree | a979e35a044fdd9bb2886b48697c0a10f2b28625 /src/mainboard/google/gru/chromeos.c | |
parent | 79df32d083d7454ef73f7bd31b1c8e6237406385 (diff) |
soc/intel/cmn/fast-spi: Add BIOS MMIO window as reserved region
Add the boot flash MMIO window to the resources to report this region as
reserved to the OS. This is done to stay consistent with the reserved
memory ranges by coreboot and make the OS aware of them.
As x86 systems preserves the upper 16 MiB below 4G for BIOS flash
decoding use the complete window for reporting independent of the
actually used SPI flash size. This will block the preserved MMIO window.
Change-Id: Ib3a77e9233c3c63bad4de926670edb4545ceaddf
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/google/gru/chromeos.c')
0 files changed, 0 insertions, 0 deletions