diff options
author | Subrata Banik <subratabanik@google.com> | 2024-10-25 14:05:37 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2024-10-26 02:54:56 +0000 |
commit | 937cac30abac48ab8c22b85aaedcf65bb2f244b0 (patch) | |
tree | 1f4c00cb1222c67b75926f22f354f47ee78091b8 /src/mainboard/google/fatcat/variants | |
parent | 892257ec2187e84c1610d97367ca59270bcbadda (diff) |
mb/google/fatcat: Drop LOCK_CONFIG for GPP_D15 in early GPIO config
Ideally lock configuration is not applicable for early GPIO
configuration (like bootblock/romstage) and is only required for GPIO
PAD configuration by later statge (like ramstage).
The GPP_D15 pin was previously configured with LOCK_CONFIG in the
early bootblock GPIO configuration. This is not necessary and prevents
later boot stages from configuring this GPIO.
Change-Id: Ie0e648b750d7579def39ed95eab862dc3245499c
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84867
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Diffstat (limited to 'src/mainboard/google/fatcat/variants')
-rw-r--r-- | src/mainboard/google/fatcat/variants/fatcat/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c index 43362b88f9..ca594465da 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c +++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c @@ -413,7 +413,7 @@ static const struct pad_config early_gpio_table[] = { /* GPP_H07: I2C3_SCL_PSS */ PAD_CFG_NF(GPP_H07, NONE, DEEP, NF1), /* GPP_D15: SPI_TPM_INT_N */ - PAD_CFG_GPI_APIC_LOCK(GPP_D15, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_APIC(GPP_D15, NONE, PLTRST, LEVEL, INVERT), }; /* Pad configuration in romstage */ |