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authorDavid Wu <david_wu@quanta.corp-partner.google.com>2021-05-11 14:20:23 +0800
committerKarthik Ramasubramanian <kramasub@google.com>2021-05-12 15:40:08 +0000
commit7216053a4207bd6aebd7250e94d59de5e6563680 (patch)
tree6538cbcf4fce9091b911dc46ab0ead3b353eca20 /src/mainboard/google/dedede/variants
parentf963a0f8e5ac5d68b17bb1f703cab617260a3fa6 (diff)
mb/google/dedede/var/metaknight: Update DPTF parameters
Remove TSR2 and use DPTF parameters from internal thermal team. BUG=b:175938681 TEST=build and boot to OS. Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: If0ec1ec48b8971efe87f1f8d10332a9c16352122 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54046 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raymond Wong <wongraymond@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
-rw-r--r--src/mainboard/google/dedede/variants/metaknight/overridetree.cb40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb
index c8c56f9a9f..d4c9ecaf4d 100644
--- a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb
@@ -64,7 +64,47 @@ chip soc/intel/jasperlake
[PchSerialIoIndexI2C5] = PchSerialIoDisabled,
}"
+ register "power_limits_config" = "{
+ .tdp_pl1_override = 6,
+ .tdp_pl2_override = 12,
+ }"
+
device domain 0 on
+ device pci 04.0 on
+ chip drivers/intel/dptf
+ register "options.tsr[0].desc" = ""Memory""
+ register "options.tsr[1].desc" = ""CPU""
+
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 90, 5000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 6000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 5000)}"
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)}"
+ register "controls.power_limits.pl1" = "{
+ .min_power = 3000,
+ .max_power = 6000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 125,}"
+ register "controls.power_limits.pl2" = "{
+ .min_power = 12000,
+ .max_power = 12000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 1000,}"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf[0]" = "{ 255, 3000 }"
+ register "controls.charger_perf[1]" = "{ 24, 1500 }"
+ register "controls.charger_perf[2]" = "{ 16, 1000 }"
+ register "controls.charger_perf[3]" = "{ 8, 500 }"
+
+ device generic 0 on end
+ end
+ end # SA Thermal device
device pci 14.0 on
chip drivers/usb/acpi
device usb 0.0 on