diff options
| author | Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> | 2021-03-23 10:43:39 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-28 16:08:17 +0000 |
| commit | 498f1285d2b7227c0f0e52ad5ed43c249412d907 (patch) | |
| tree | be62e77f8aadb16ff1b5902ddc68bca153acee2c /src/mainboard/google/dedede/variants | |
| parent | 800fab86dcb17ca133d6a1500773c240c31d1847 (diff) | |
mb/google/dedede/var/boten: Fix DPTF passive and critical policies
Thermal sensor2 defined in baseboard do not exist in boten.
With the format the DPTF policies are defined in boten, all the entries
from the baseboard are included and then the overrides applied.
This causes the non-existent DPTF devices to be exported in the ACPI table
and in turn OS reading invalid temperatures. Fix the format for
DPTF passive and critical policies.
BUG=None
BRANCH=dedede
TEST=Build and boot to OS in boten. Ensure that the DPTF entries look
correct in both static.c and SSDT tables i.e. passive and critical
policies for applicable devices only are present.
Change-Id: I63c781e0a439f1e7a3525fa7cf290fa9300cb066
Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Ben Kao <ben.kao@intel.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants')
| -rw-r--r-- | src/mainboard/google/dedede/variants/boten/overridetree.cb | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/boten/overridetree.cb b/src/mainboard/google/dedede/variants/boten/overridetree.cb index d6142356b8..34044ff569 100644 --- a/src/mainboard/google/dedede/variants/boten/overridetree.cb +++ b/src/mainboard/google/dedede/variants/boten/overridetree.cb @@ -75,6 +75,21 @@ chip soc/intel/jasperlake }" device domain 0 on + device pci 04.0 on + chip drivers/intel/dptf + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), + [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000),}" + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),}" + device generic 0 on end + end + end device pci 14.0 on chip drivers/usb/acpi register "desc" = ""Root Hub"" |