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author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2023-09-21 22:40:43 +0530 |
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committer | sridhar siricilla <siricillasridhar@gmail.com> | 2023-09-23 16:49:56 +0000 |
commit | 17cea380d9856ed5765e5233aa2d6edeaa3a16c5 (patch) | |
tree | 7989030491b291e1013597b489c9d416526fcde5 /src/mainboard/google/butterfly/chromeos.c | |
parent | 64ec6a77be361c748e646af0967d14bdc0c52815 (diff) |
commonlib: Add CBMEM ID to store CSE Boot Partition Info
PSR data is created and stored in CSE data partition. In platforms that
employ CSE Lite SKU firmware, a firmware downgrade involves clearing of
CSE data partition which results in PSR data being lost. In order to
backup PSR data before initiating firmware downgrade, CSE Lite firmware
supports a command to do this. This command works only after memory has
been initialized. So the CSE firmware downgrade can be done only in
post-RAM stage. CSE firmware sync actions will be moved to early
ramstage to support this.
Moving CSE firmware sync actions to ramstage results in cse_get_bp_info
command taking additional boot time of ~45-55ms. To avoid this,
cse_get_bp_info will be sent in early romstage and the response will be
stored in cbmem to avoid sending the command again, and re-use in
ramstage.
This patch adds a CBMEM ID to store this CSE Boot Partition Info
response in cbmem.
BUG=b:273207144
Change-Id: I914befadab4ad0ac197435e2a2c4343a796b2b1b
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: sridhar siricilla <siricillasridhar@gmail.com>
Diffstat (limited to 'src/mainboard/google/butterfly/chromeos.c')
0 files changed, 0 insertions, 0 deletions