diff options
| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2024-05-08 15:29:27 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-05-12 18:50:39 +0000 |
| commit | a56baa1d50f7bbc7533a396b6c2e236109a14a47 (patch) | |
| tree | cb95c0692aeedde7a6017f04249606ac5607c40e /src/mainboard/google/brya | |
| parent | eacc1c7ea961016a4675f494ccfaebb53f68b777 (diff) | |
mb/google/brya/var/riven: Generate SPD ID for supported parts
Add supported memory parts in mem_parts_used.txt, and generate
SPD id for these parts.
1. MT62F1G32D4DR-031 WT:B (Mircon)
2. MT62F512M32D2DR-031 WT:B (Mircon)
3. H9JCNNNBK3MLYR-N6E (Hynix)
4. K3LKLKL0EM-MGCN (Samsung)
5. K3LKBKB0BM-MGCP (Samsung)
6. H9JCNNNCP3MLYR-N6E (Hynix)
BUG=b:337169542
TEST=build pass
Change-Id: I0ff3b1e14fb8bb87d8fc9cbe0e177a5bcedef08c
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82255
Reviewed-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/mainboard/google/brya')
3 files changed, 24 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/riven/memory/Makefile.mk b/src/mainboard/google/brya/variants/riven/memory/Makefile.mk index eace2e443e..0288c51143 100644 --- a/src/mainboard/google/brya/variants/riven/memory/Makefile.mk +++ b/src/mainboard/google/brya/variants/riven/memory/Makefile.mk @@ -1,5 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! -# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/riven/memory/ src/mainboard/google/brya/variants/riven/memory/mem_parts_used.txt -SPD_SOURCES = placeholder +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B, H9JCNNNCP3MLYR-N6E +SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E +SPD_SOURCES += spd/lp5/set-0/spd-5.hex # ID = 2(0b0010) Parts = K3LKLKL0EM-MGCN +SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 3(0b0011) Parts = K3LKBKB0BM-MGCP diff --git a/src/mainboard/google/brya/variants/riven/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/riven/memory/dram_id.generated.txt index fa247902ee..f767092075 100644 --- a/src/mainboard/google/brya/variants/riven/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/riven/memory/dram_id.generated.txt @@ -1 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/riven/memory/ src/mainboard/google/brya/variants/riven/memory/mem_parts_used.txt + DRAM Part Name ID to assign +MT62F1G32D4DR-031 WT:B 0 (0000) +MT62F512M32D2DR-031 WT:B 1 (0001) +H9JCNNNBK3MLYR-N6E 1 (0001) +K3LKLKL0EM-MGCN 2 (0010) +K3LKBKB0BM-MGCP 3 (0011) +H9JCNNNCP3MLYR-N6E 0 (0000) diff --git a/src/mainboard/google/brya/variants/riven/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/riven/memory/mem_parts_used.txt index 2499005682..b08faac3e7 100644 --- a/src/mainboard/google/brya/variants/riven/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/riven/memory/mem_parts_used.txt @@ -9,3 +9,9 @@ # See util/spd_tools/README.md for more details and instructions. # Part Name +MT62F1G32D4DR-031 WT:B +MT62F512M32D2DR-031 WT:B +H9JCNNNBK3MLYR-N6E +K3LKLKL0EM-MGCN +K3LKBKB0BM-MGCP +H9JCNNNCP3MLYR-N6E |