diff options
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2023-02-07 12:57:30 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-10 18:14:17 +0000 |
| commit | a2e0c3d209135b5018a1d3dabc93957e27a387d4 (patch) | |
| tree | b0b55417bfc1a35d469d3dcbaa2eefbda75e55b9 /src/mainboard/google/brya | |
| parent | 94f90c5aea670c77b0527a5340a2e89a984d3279 (diff) | |
mb/google/brya/var/brya0: update PL1 minimum value
Update Power Limit1 (PL1) minimum value to 15W based on the Brya
design.
BRANCH=firmware-brya-14505.B
BUG=b:235311241
TEST=Built and tested on Brya system
Change-Id: Ifd5256221b82eae2cfe8009918f8ff4791751b4d
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72868
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/mainboard/google/brya')
| -rw-r--r-- | src/mainboard/google/brya/variants/brya0/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index b4ec816c6c..ed476f62b5 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -194,7 +194,7 @@ chip soc/intel/alderlake register "controls.power_limits" = "{ .pl1 = { - .min_power = 3000, + .min_power = 15000, .max_power = 15000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 32 * MSECS_PER_SEC, |