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authorJianeng Ceng <cengjianeng@huaqin.corp-partner.google.com>2024-04-07 21:34:05 +0800
committerEric Lai <ericllai@google.com>2024-04-24 06:18:31 +0000
commit51e472d568339fd76222933b16b88ddafaa8177b (patch)
tree01ccf3cfe4cb62069e937bd2c833a09e0171e647 /src/mainboard/google/brya
parent28b01563693c6d51c74c7fd2893978809c372989 (diff)
mb/google/nissa/var/anraggar: Add cbj_sleeve to control mic jack
Add a new GPIO port cbj-sleeve for kernel driver to call. At the same time, a new rt5645 driver is added to replace the generic driver to parse gpio. After entering the system, it is pulled high by the kernel to enable the MIC function. BUG=None TEST=MIC function is normal Change-Id: I093be6a3e357aae389fcbe8291a9701c40b62e15 Signed-off-by: Jianeng Ceng <cengjianeng@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81774 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/Kconfig1
-rw-r--r--src/mainboard/google/brya/variants/anraggar/overridetree.cb8
2 files changed, 4 insertions, 5 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 517e4bca80..1e10d40354 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -8,6 +8,7 @@ config BOARD_GOOGLE_BRYA_COMMON
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_I2C_NAU8825
+ select DRIVERS_I2C_RT5645
select DRIVERS_INTEL_DPTF
select DRIVERS_INTEL_DPTF_SUPPORTS_TPCH
select DRIVERS_INTEL_PMC
diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
index c7942c145d..2f5b1d212b 100644
--- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
@@ -348,15 +348,13 @@ chip soc/intel/alderlake
end
end
device ref i2c3 on
- chip drivers/i2c/generic
+ chip drivers/i2c/rt5645
register "hid" = ""10EC5650""
register "name" = ""RT58""
register "desc" = ""Realtek RT5650""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
- register "property_count" = "1"
- register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
- register "property_list[0].name" = ""realtek,jd-mode""
- register "property_list[0].integer" = "2"
+ register "cbj_sleeve" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
+ register "jd_mode" = "2"
device i2c 1a on end
end
end