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authorKevin Chiu <kevin.chiu.17802@gmail.com>2022-10-31 15:02:26 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-11-02 21:35:42 +0000
commitc32d7b42bc61fece5c48d0b1db6bb7cb6c28d45f (patch)
treefafb24815d6d0908694cab94a42abb53d6965b8f /src/mainboard/google/brya
parent8dafcc60793480ad89079b37b26f98ed52dc5ce9 (diff)
mb/google/brya/var/lisbon: Enable SaGv
Enable SaGv support for lisbon BUG=b:246657849 TEST=FW_NAME=lisbon emerge-brask coreboot pass RMT verification Signed-off-by: Kevin Chiu <kevin.chiu.17802@gmail.com> Change-Id: Ic7d3203bfe06973b023a38d1aa3d69cce5c3a60c Reviewed-on: https://review.coreboot.org/c/coreboot/+/69013 Reviewed-by: Ricky Chang <rickytlchang@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/brya')
-rw-r--r--src/mainboard/google/brya/variants/lisbon/overridetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/lisbon/overridetree.cb b/src/mainboard/google/brya/variants/lisbon/overridetree.cb
index 67b0d9b41f..f952c3ee81 100644
--- a/src/mainboard/google/brya/variants/lisbon/overridetree.cb
+++ b/src/mainboard/google/brya/variants/lisbon/overridetree.cb
@@ -6,6 +6,8 @@ fw_config
end
chip soc/intel/alderlake
+ register "sagv" = "SaGv_Enabled"
+
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |