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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-21 10:28:16 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-09-29 10:05:51 +0000 |
| commit | ab0e0813b669c6f2af3c9400e403cb5850a7af92 (patch) | |
| tree | 06cc975d4bbe736f28d1b70854675b38dc44edb9 /src/mainboard/google/brya | |
| parent | c0534435bf6c36bf087e81250cabbac9f4b5a25b (diff) | |
soc/intel/alderlake: Add support for power cycle and SLP signal duration
The UPDs for PM power cycle duration and SLP_* signal durations are all
identical to Tiger Lake, so add similar support, but use enums instead
of comments to represent the durations symbolically.
BUG=b:184799383
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I4a531f042658894bcbc6a76eff453c06e90d66b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57891
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya')
0 files changed, 0 insertions, 0 deletions