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author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2022-04-01 23:51:30 +0530 |
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committer | Patrick Georgi <patrick@coreboot.org> | 2022-04-07 08:11:43 +0000 |
commit | d7cdeee74d2f0b701c614e1e7e7a177eecede55a (patch) | |
tree | 6907ca8807d098616e81cc2b3e5ff508ac4006a6 /src/mainboard/google/brya/variants | |
parent | 662353ac3e75409512c0f49b978cda4c0b9fd7fe (diff) |
soc/intel/alderlake: Remove ALDERLAKE_A0_CONFIG_PMC_DESCRIPTOR Kconfig
The patch removes Kconfig CONFIG_ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
code which updates PMC descriptor for an intermediate ADL-P SoC
stepping A0. Since intermediate ADL-P SoC is no longer supported and no
board is selecting the Kconfig, so remove the code that updates PMC
descriptor.
TEST=Build and boot Gimble board
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I2a629353a4194a7505655346dcab4ef53059e0b7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63339
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants')
0 files changed, 0 insertions, 0 deletions