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authorWerner Zeh <werner.zeh@siemens.com>2022-12-22 11:05:17 +0100
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2023-01-10 00:30:47 +0000
commit921bb34c919a617706f269b89333b5dede59880f (patch)
treeacaca2867a0f1ab0fc8510ee5fbfc42b926aa1fd /src/mainboard/google/brya/variants
parentfc84ae7aa3cf7e8000ef69f854281f4648eeb2b8 (diff)
soc/intel/elkhartlake: Make SATA speed limit configurable
In cases where there are limitations on the mainboard it can be necessary to limit the used SATA speed even though both, the SATA controller and disk drive support a higher speed rate. The FSP parameter 'SataSpeedLimit' allows to set the speed limit. This patch provides a chip config so that this FSP parameter can be set as needed in the devicetree on mainboard level. Change-Id: I610263b34b0947378d2025211ece4a9ec8fbfef6 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71229 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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