summaryrefslogtreecommitdiff
path: root/src/mainboard/google/brya/variants/marasov
diff options
context:
space:
mode:
authorWon Chung <wonchung@google.com>2023-06-01 00:26:39 +0000
committerMartin L Roth <gaumless@gmail.com>2023-06-04 19:16:34 +0000
commit7906d0e1226b75f4efd202c028a52f13d7fd4f25 (patch)
tree485b760ff87c91435fd9c3d65312159e00f70038 /src/mainboard/google/brya/variants/marasov
parent96edcc1c98eb34bf6acfc78d1f87180497bb60e8 (diff)
mb/google/brya/var/marasov: Fix PLD group order
Ensure USB-C ports' _PLD group numbers appear in order. get_usb_port_references in src/ec/google/chromeec/ec_acpi.c uses group token to match with the Type-C port number. BUG=b:216490477 TEST=build coreboot and system boot into OS. BRANCH=firmware-brya-14505.B Change-Id: I51ff0991565d60807c100b33fb66ab10cc48b8e1 Signed-off-by: Won Chung <wonchung@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/marasov')
-rw-r--r--src/mainboard/google/brya/variants/marasov/overridetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb
index dfbf3f61df..581eb3b813 100644
--- a/src/mainboard/google/brya/variants/marasov/overridetree.cb
+++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb
@@ -372,7 +372,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end
end
@@ -393,7 +393,7 @@ chip soc/intel/alderlake
register "desc" = ""USB2 Type-C Port C2 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi