diff options
author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 20:32:15 +0200 |
---|---|---|
committer | Felix Singer <felixsinger@posteo.net> | 2024-06-26 11:44:13 +0000 |
commit | 4b7220398923af42fa39a7fcb532daf797510f77 (patch) | |
tree | f338082fc94ba81015f56348d48fe159fc238201 /src/mainboard/facebook | |
parent | df7de392ef5f8e1654df96a1a050820eb3779012 (diff) |
skl mainboards/dt: Move serirq setting into LPC device scope
Change-Id: I84da5365907664ce223dec4adb22a8f1a6e2a144
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83188
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/facebook')
-rw-r--r-- | src/mainboard/facebook/monolith/devicetree.cb | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index c41a26f1cf..763a3808d1 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -18,9 +18,6 @@ chip soc/intel/skylake register "lpc_iod" = "0x0070" register "lpc_ioe" = "LPC_IOE_COMA_EN | LPC_IOE_COMB_EN | LPC_IOE_EC_62_66" - # LPC serial IRQ - register "serirq_mode" = "SERIRQ_CONTINUOUS" - # "Intel SpeedStep Technology" register "eist_enable" = "1" @@ -214,6 +211,8 @@ chip soc/intel/skylake device ref uart0 on end device ref emmc on end device ref lpc_espi on + register "serirq_mode" = "SERIRQ_CONTINUOUS" + # CPLD host command ranges are in 0x280-0x2BF # EC PNP registers are at 0x6e and 0x6f register "gen1_dec" = "0x003c0281" |