diff options
| author | Frans Hendriks <fhendriks@eltan.com> | 2021-12-02 08:08:17 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-09 20:54:15 +0000 |
| commit | e6ffdb47cd35323d7a78696cc6794330bea36d23 (patch) | |
| tree | 8eb2400cb77a27f24df6b0cdc608688a5c466c57 /src/mainboard/facebook | |
| parent | 26e384bf34d0a934e9acc4a88cd9482d78826b8b (diff) | |
mb/facebook/fbg1701: Remove ONBOARD_SAMSUNG_MEM
CONFIG_ONBOARD_SAMSUMG_MEM was used to force Samsung memory.
CPLD returns different values for every board revision. Use this value
to determine the memory type.
BUG = N/A
TEST = Boot Facebook FBG1701 Rev 1.0 - 1.4
Change-Id: I21b5ddc430410a1e8b3e9012d0c07d278880ff47
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/facebook')
| -rw-r--r-- | src/mainboard/facebook/fbg1701/romstage.c | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/src/mainboard/facebook/fbg1701/romstage.c b/src/mainboard/facebook/fbg1701/romstage.c index fd005a6bf2..7a31309a06 100644 --- a/src/mainboard/facebook/fbg1701/romstage.c +++ b/src/mainboard/facebook/fbg1701/romstage.c @@ -18,13 +18,24 @@ void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params) { - u8 spd_index = 0; + u8 spd_index; - if (!CONFIG(ONBOARD_SAMSUNG_MEM)) { - if (cpld_read_pcb_version() <= 7) - spd_index = 1; - else - spd_index = 2; + switch (cpld_read_pcb_version()) { + case 0: /* intentional fallthrough */ + case 1: /* intentional fallthrough */ + case 2: /* intentional fallthrough */ + case 3: /* intentional fallthrough */ + case 4: /* intentional fallthrough */ + case 5: + spd_index = 0; + break; + case 6: /* intentional fallthrough */ + case 7: + spd_index = 1; + break; + default: + spd_index = 2; + break; } memory_params->PcdMemoryTypeEnable = MEM_DDR3; |