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authorFelix Held <felix-coreboot@felixheld.de>2023-12-15 11:15:26 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-16 20:14:47 +0000
commit9314bb6f0a991593b5fb9a6a6cced5aad02e6587 (patch)
tree408feacbb91ca92fdf59c3c4ed62a3bcb36649b6 /src/mainboard/emulation/spike-riscv/devicetree.cb
parentd123f8d8716811149ecdf7d51661d8cee6f48577 (diff)
vc/amd/opensil: add _POC suffix to SOC_AMD_OPENSIL_GENOA
The openSIL code for the Genoa SoC is only a proof of concept, so change the name of the Kconfig option to include this code in the build from SOC_AMD_OPENSIL_GENOA to SOC_AMD_OPENSIL_GENOA_POC to clarify that this is code that isn't intended or ready to be productized. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If91cdaa7c324426964bba2de2109b6c38482fab8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79574 Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
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