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author | Roy Mingi Park <roy.mingi.park@intel.com> | 2018-10-10 15:07:59 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-17 11:59:54 +0000 |
commit | 9814f8f037d4735f2f45b586c20573238d659b31 (patch) | |
tree | 985f028b114fc47b2b52e76d060fec4b88e82c0c /src/mainboard/emulation/qemu-riscv/memlayout.ld | |
parent | 6c96542a3e7936bcad6e2ea683f9244383a36f59 (diff) |
mb/google/poppy/variants/nocturne: Disable pull-down of GPP_E9/E10
While these pins were set to a pull-down 20KOhm, NPCX EC consumes
~2.1mW higher power. Becasue there was leakage current on both GPIO67
and GPIO70 from NPCX EC. With the external pull-up 10KOhm for
USB_OC0#/USB2_OC1#, this wasn't enough to prevent leakage current.
BUG=b:117139495
TEST=Check nxpc EC power to see power improvement
Change-Id: I685d876461c263f07ca4c8f8046635cb7087279c
Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-on: https://review.coreboot.org/29007
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/emulation/qemu-riscv/memlayout.ld')
0 files changed, 0 insertions, 0 deletions