diff options
author | Felix Held <felix.held@amd.corp-partner.google.com> | 2020-07-09 00:04:22 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-07-09 23:19:31 +0000 |
commit | 357cc6552ab6f0202c329e9565b278366e2494b8 (patch) | |
tree | cca4ddc1ce07d02ea65ac384d51a5bc91353879c /src/mainboard/emulation/qemu-q35/chromeos.c | |
parent | 66dcda9e1571cf2f7d46723a23cf043ad9a0f74e (diff) |
include/cpu/amd/msr: move SMM_LOCK bit right after HWCR_MSR definition
The SMM_LOCK bit isn't in SMM_MASK_MSR, but in HWCR_MSR, so move it
there. The soc/amd/* code itself uses the bit definition when accessing
HWCR_MSR, so SMM_LOCK was just below the wrong MSR definition.
Also remove SMM_LOCK from comment about masking bits in SMM_MASK_MSR,
since that bit isn't in that MSR.
TEST=Checked the code and the corresponding BKDG/PPR.
Change-Id: I2df446f5a9e11e1e7c8d10256f3c2803b18f9088
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43309
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/emulation/qemu-q35/chromeos.c')
0 files changed, 0 insertions, 0 deletions