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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-03 23:57:22 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2022-11-02 21:05:11 +0000
commit0ca534e059acc884aa999d727dcb67f76dd885ba (patch)
tree23c394fddae3b006ba73d23bb6707ff7984b749e /src/mainboard/clevo
parenta972e238dd63beca0c60bf00c6e1cef0bed95d27 (diff)
mb/clevo/l140cu: enable S0ix
Enable S0ix for the board, as done in vendor fw. Change-Id: Ifdf93e1e599e7cc03fc02297eafb49d34b1f6172 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68792 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/clevo')
-rw-r--r--src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
index cbd8bcbdb5..bfcc046157 100644
--- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
+++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
@@ -1,4 +1,5 @@
chip soc/intel/cannonlake
+ register "s0ix_enable" = "1"
register "common_soc_config" = "{
/* Touchpad */
.i2c[0] = {