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authorSimon Yang <simon1.yang@intel.com>2021-06-22 10:15:20 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-07-28 11:40:45 +0000
commitdf520855ca14095729fdb9a10c26852f397879de (patch)
tree9d43607f1970893a1ef18a46482d9017caba6915 /src/mainboard/bostentech
parent1ebcb2ab62b9fa258b4fe614df70250efebec54a (diff)
soc/intel/jsl: Add disable_external_bypass_vr config
This dev tree config controls the Vnn/Vcc1P05 bypass mode for Jasperlake. BUG=b:191691430 BRANCH=dedede TEST=Build fw and confirm FSP setting are set properly by log Signed-off-by: Simon Yang <simon1.yang@intel.com> Change-Id: I10bc203d3fed32ab65f325978426b7d0fca6f392 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jamie Chen <jamie.chen@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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