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authorAngel Pons <th3fanbus@gmail.com>2019-01-07 11:25:29 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-07 10:39:08 +0000
commit438f86166325e4f8089be5c65b40075d77a0406c (patch)
tree0fd65b4e5adb6e7946964762255fcb7c0e2380b5 /src/mainboard/asus
parent5bd926428eb0972074ec056835eb0f85984846d3 (diff)
src/mb/asus/p5qpl-am/romstage.c: Fix comment
Change-Id: I2b3ad53766bc9cef5ae00392814a03a3e177ad35 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/30705 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/p5qpl-am/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/romstage.c
index bc04261848..96473bbcc5 100644
--- a/src/mainboard/asus/p5qpl-am/romstage.c
+++ b/src/mainboard/asus/p5qpl-am/romstage.c
@@ -54,7 +54,7 @@ static u8 msr_get_fsb(void)
}
/*
- * BSEL mch straps are not hooked up to the CPU as usual but the the SIO
+ * BSEL MCH straps are not hooked up to the CPU as usual but to the SIO
* BSEL0 -> not hooked up (such configs are not supported anyways)
* BSEL1 -> GPIO33
* BSEL2 -> GPIO40