diff options
| author | Keith Hui <buurin@gmail.com> | 2024-02-05 16:11:26 -0500 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-06-07 22:39:18 +0000 |
| commit | c36b5ea18983e3dbb021ae3012698d1357dcdf66 (patch) | |
| tree | f2575cdcf079c721cf89bba887cf2d28b791a256 /src/mainboard/asus/p8x7x-series/variants | |
| parent | 51a01bdcd65370c29342f51a29fa5741447f09dc (diff) | |
mb/*: Copy bd82x6x boards' USB port config into devicetree
For mainboards using southbridge/intel/bd82x6x, copy the contents
of mainboard_usb_ports array into southbridge devicetree. In-line
comments are maintained.
Boards also capable of using MRC raminit are done in a separate
patch.
Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81879
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p8x7x-series/variants')
3 files changed, 49 insertions, 0 deletions
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb index 4b7bb1c75e..1e8d807669 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb @@ -7,6 +7,22 @@ chip northbridge/intel/sandybridge subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" + register "usb_port_config" = "{ + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 1 }, + { 1, 0, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 4 }, + { 1, 0, 4 }, + { 1, 0, 6 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 } + }" device ref pcie_rp1 on end # PCIEX16_4 (electrical x4) device ref pcie_rp2 off end device ref pcie_rp3 off end diff --git a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb index dbf1f359b5..1389304671 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb @@ -4,6 +4,22 @@ chip northbridge/intel/sandybridge device domain 0 on subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x + register "usb_port_config" = "{ + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 1 }, + { 1, 0, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 4 }, + { 1, 0, 4 }, + { 1, 0, 6 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 } + }" register "gen1_dec" = "0x000c0291" device ref pcie_rp1 on end # PCIEX16_2 (electrical x4) device ref pcie_rp2 off end diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb index 0ae41b3acc..66bc5bb180 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb @@ -4,6 +4,23 @@ chip northbridge/intel/sandybridge device domain 0 on subsystemid 0x1043 0x84ca inherit chip southbridge/intel/bd82x6x + register "usb_port_config" = "{ + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 1 }, + { 1, 0, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 4 }, + { 1, 0, 4 }, + { 1, 0, 6 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 } +}" + register "gen1_dec" = "0x000c0291" device ref pcie_rp1 on end # PCIEX16_2 (electrical x4) |